| /linux/arch/sparc/kernel/ |
| H A D | iommu.c | 2 /* iommu.c: Generic sparc64 IOMMU support.
15 #include <linux/iommu-helper.h>
17 #include <asm/iommu-common.h>
23 #include <asm/iommu.h>
49 /* Must be invoked under the IOMMU lock. */
52 struct iommu *iommu = container_of(iommu_map_table, struct iommu, tbl); in iommu_flushall() local
53 if (iommu->iommu_flushinv) { in iommu_flushall()
54 iommu_write(iommu->iommu_flushinv, ~(u64)0); in iommu_flushall()
59 tag = iommu->iommu_tags; in iommu_flushall()
66 (void) iommu_read(iommu->write_complete_reg); in iommu_flushall()
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| H A D | iommu-common.c | 3 * IOMMU mmap management and range allocation functions.
4 * Based almost entirely upon the powerpc iommu allocator.
10 #include <linux/iommu-helper.h>
13 #include <asm/iommu-common.h>
19 static inline bool need_flush(struct iommu_map_table *iommu) in need_flush() argument
21 return ((iommu->flags & IOMMU_NEED_FLUSH) != 0); in need_flush()
24 static inline void set_flush(struct iommu_map_table *iommu) in set_flush() argument
26 iommu->flags |= IOMMU_NEED_FLUSH; in set_flush()
29 static inline void clear_flush(struct iommu_map_table *iommu) in clear_flush() argument
31 iommu->flags &= ~IOMMU_NEED_FLUSH; in clear_flush()
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| H A D | pci_sun4v.c | 21 #include <asm/iommu-common.h>
23 #include <asm/iommu.h>
58 unsigned long prot; /* IOMMU page protections */
78 static inline bool iommu_use_atu(struct iommu *iommu, u64 mask) in iommu_use_atu() argument
80 return iommu->atu && mask > DMA_BIT_MASK(32); in iommu_use_atu()
102 if (!iommu_use_atu(pbm->iommu, mask)) { in iommu_batch_flush()
109 pr_err_ratelimited("%s: IOMMU map of [%08lx:%08llx:%lx:%lx:%lx] failed with status %ld\n", in iommu_batch_flush()
119 iotsb_num = pbm->iommu->atu->iotsb->iotsb_num; in iommu_batch_flush()
188 struct iommu *iommu; in dma_4v_alloc_coherent() local
213 iommu = dev->archdata.iommu; in dma_4v_alloc_coherent()
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| /linux/drivers/iommu/ |
| H A D | sun50i-iommu.c | 14 #include <linux/iommu.h>
29 #include "iommu-pages.h"
101 struct iommu_device iommu; member
103 /* Lock to modify the IOMMU registers */
125 struct sun50i_iommu *iommu; member
138 static u32 iommu_read(struct sun50i_iommu *iommu, u32 offset) in iommu_read() argument
140 return readl(iommu->base + offset); in iommu_read()
143 static void iommu_write(struct sun50i_iommu *iommu, u32 offset, u32 value) in iommu_write() argument
145 writel(value, iommu->base + offset); in iommu_write()
149 * The Allwinner H6 IOMMU uses a 2-level page table.
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| H A D | vsi-iommu.c | 4 * IOMMU API for Verisilicon
11 * That make very similar to Rockhip iommu hardware blocks but it has
27 #include <linux/iommu.h>
39 #include "iommu-pages.h"
46 struct iommu_device iommu; member
48 struct iommu_domain *domain; /* domain to which iommu is attached */
72 /* vsi iommu regs address */
194 struct vsi_iommu *iommu = dev_id; in vsi_iommu_irq() local
199 if (pm_runtime_resume_and_get(iommu->dev) < 0) in vsi_iommu_irq()
202 spin_lock_irqsave(&iommu->lock, flags); in vsi_iommu_irq()
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| H A D | iommu-sysfs.c | 3 * IOMMU sysfs class support
10 #include <linux/iommu.h>
16 * As devices are added to the IOMMU, we'll add links to the group.
38 .name = "iommu",
50 * Init the struct device for the IOMMU. IOMMU specific attributes can
52 * IOMMU type.
54 int iommu_device_sysfs_add(struct iommu_device *iommu, in iommu_device_sysfs_add() argument
62 iommu->dev = kzalloc_obj(*iommu->dev); in iommu_device_sysfs_add()
63 if (!iommu->dev) in iommu_device_sysfs_add()
66 device_initialize(iommu->dev); in iommu_device_sysfs_add()
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| H A D | omap-iommu.c | 3 * omap iommu: tlb and pagetable primitives
18 #include <linux/iommu.h>
19 #include <linux/omap-iommu.h>
30 #include <linux/platform_data/iommu-omap.h>
33 #include "omap-iommu.h"
57 * @dom: generic iommu domain handle
325 * load_iotlb_entry - Set an iommu tlb entry
326 * @obj: target iommu
327 * @e: an iommu tlb entry info
401 * flush_iotlb_page - Clear an iommu tlb entry
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| /linux/drivers/iommu/amd/ |
| H A D | init.c | 19 #include <linux/amd-iommu.h>
25 #include <asm/iommu.h>
38 #include "../iommu-pages.h"
98 * structure describing one IOMMU in the ACPI table. Typically followed by one
118 * A device entry describing which devices a specific IOMMU translates and
139 * An AMD IOMMU memory definition structure. It defines things like exclusion
238 bool translation_pre_enabled(struct amd_iommu *iommu) in translation_pre_enabled() argument
240 return (iommu->flags & AMD_IOMMU_FLAG_TRANS_PRE_ENABLED); in translation_pre_enabled()
243 static void clear_translation_pre_enabled(struct amd_iommu *iommu) in clear_translation_pre_enabled() argument
245 iommu in clear_translation_pre_enabled()
248 init_translation_status(struct amd_iommu * iommu) init_translation_status() argument
273 struct amd_iommu *iommu; get_global_efr() local
308 early_iommu_features_init(struct amd_iommu * iommu,struct ivhd_header * h) early_iommu_features_init() argument
321 iommu_read_l1(struct amd_iommu * iommu,u16 l1,u8 address) iommu_read_l1() argument
330 iommu_write_l1(struct amd_iommu * iommu,u16 l1,u8 address,u32 val) iommu_write_l1() argument
337 iommu_read_l2(struct amd_iommu * iommu,u8 address) iommu_read_l2() argument
346 iommu_write_l2(struct amd_iommu * iommu,u8 address,u32 val) iommu_write_l2() argument
361 iommu_set_cwwb_range(struct amd_iommu * iommu) iommu_set_cwwb_range() argument
385 iommu_set_device_table(struct amd_iommu * iommu) iommu_set_device_table() argument
402 iommu_feature_set(struct amd_iommu * iommu,u64 val,u64 mask,u8 shift) iommu_feature_set() argument
414 iommu_feature_enable(struct amd_iommu * iommu,u8 bit) iommu_feature_enable() argument
419 iommu_feature_disable(struct amd_iommu * iommu,u8 bit) iommu_feature_disable() argument
425 iommu_enable(struct amd_iommu * iommu) iommu_enable() argument
430 iommu_disable(struct amd_iommu * iommu) iommu_disable() argument
473 iommu_unmap_mmio_space(struct amd_iommu * iommu) iommu_unmap_mmio_space() argument
725 alloc_command_buffer(struct amd_iommu * iommu) alloc_command_buffer() argument
736 amd_iommu_restart_log(struct amd_iommu * iommu,const char * evt_type,u8 cntrl_intr,u8 cntrl_log,u32 status_run_mask,u32 status_overflow_mask) amd_iommu_restart_log() argument
761 amd_iommu_restart_event_logging(struct amd_iommu * iommu) amd_iommu_restart_event_logging() argument
772 amd_iommu_restart_ga_log(struct amd_iommu * iommu) amd_iommu_restart_ga_log() argument
783 amd_iommu_reset_cmd_buffer(struct amd_iommu * iommu) amd_iommu_reset_cmd_buffer() argument
799 iommu_enable_command_buffer(struct amd_iommu * iommu) iommu_enable_command_buffer() argument
822 iommu_disable_command_buffer(struct amd_iommu * iommu) iommu_disable_command_buffer() argument
827 free_command_buffer(struct amd_iommu * iommu) free_command_buffer() argument
832 iommu_alloc_4k_pages(struct amd_iommu * iommu,gfp_t gfp,size_t size) iommu_alloc_4k_pages() argument
854 struct amd_iommu *iommu; alloc_event_buffer() local
868 struct amd_iommu *iommu; iommu_enable_event_buffer() local
898 iommu_disable_event_buffer(struct amd_iommu * iommu) iommu_disable_event_buffer() argument
903 free_event_buffer(struct amd_iommu * iommu) free_event_buffer() argument
908 free_ga_log(struct amd_iommu * iommu) free_ga_log() argument
919 iommu_ga_log_enable(struct amd_iommu * iommu) iommu_ga_log_enable() argument
954 iommu_init_ga_log(struct amd_iommu * iommu) iommu_init_ga_log() argument
979 alloc_cwwb_sem(struct amd_iommu * iommu) alloc_cwwb_sem() argument
990 struct amd_iommu *iommu; remap_event_buffer() local
1004 remap_command_buffer(struct amd_iommu * iommu) remap_command_buffer() argument
1015 remap_or_alloc_cwwb_sem(struct amd_iommu * iommu) remap_or_alloc_cwwb_sem() argument
1037 alloc_iommu_buffers(struct amd_iommu * iommu) alloc_iommu_buffers() argument
1066 free_cwwb_sem(struct amd_iommu * iommu) free_cwwb_sem() argument
1071 unmap_cwwb_sem(struct amd_iommu * iommu) unmap_cwwb_sem() argument
1081 unmap_command_buffer(struct amd_iommu * iommu) unmap_command_buffer() argument
1086 unmap_event_buffer(struct amd_iommu * iommu) unmap_event_buffer() argument
1091 free_iommu_buffers(struct amd_iommu * iommu) free_iommu_buffers() argument
1104 iommu_enable_xt(struct amd_iommu * iommu) iommu_enable_xt() argument
1117 iommu_enable_gt(struct amd_iommu * iommu) iommu_enable_gt() argument
1142 __reuse_device_table(struct amd_iommu * iommu) __reuse_device_table() argument
1206 struct amd_iommu *iommu; reuse_device_table() local
1273 set_dev_entry_from_acpi_range(struct amd_iommu * iommu,u16 first,u16 last,u32 flags,u32 ext_flags) set_dev_entry_from_acpi_range() argument
1328 set_dev_entry_from_acpi(struct amd_iommu * iommu,u16 devid,u32 flags,u32 ext_flags) set_dev_entry_from_acpi() argument
1445 init_iommu_from_acpi(struct amd_iommu * iommu,struct ivhd_header * h) init_iommu_from_acpi() argument
1783 free_sysfs(struct amd_iommu * iommu) free_sysfs() argument
1791 free_iommu_one(struct amd_iommu * iommu) free_iommu_one() argument
1803 struct amd_iommu *iommu, *next; free_iommu_all() local
1818 amd_iommu_erratum_746_workaround(struct amd_iommu * iommu) amd_iommu_erratum_746_workaround() argument
1849 amd_iommu_ats_write_check_workaround(struct amd_iommu * iommu) amd_iommu_ats_write_check_workaround() argument
1875 init_iommu_one(struct amd_iommu * iommu,struct ivhd_header * h,struct acpi_table_header * ivrs_base) init_iommu_one() argument
1954 init_iommu_one_late(struct amd_iommu * iommu) init_iommu_one_late() argument
2023 struct amd_iommu *iommu; init_iommu_all() local
2068 init_iommu_perf_ctr(struct amd_iommu * iommu) init_iommu_perf_ctr() argument
2091 struct amd_iommu *iommu = dev_to_amd_iommu(dev); amd_iommu_show_cap() local
2125 late_iommu_features_init(struct amd_iommu * iommu) late_iommu_features_init() argument
2155 iommu_init_pci(struct amd_iommu * iommu) iommu_init_pci() argument
2308 struct amd_iommu *iommu; amd_iommu_init_pci() local
2357 iommu_setup_msi(struct amd_iommu * iommu) iommu_setup_msi() argument
2437 struct amd_iommu *iommu = irqd->chip_data; intcapxt_unmask_irq() local
2452 struct amd_iommu *iommu = irqd->chip_data; intcapxt_mask_irq() local
2517 __iommu_setup_intcapxt(struct amd_iommu * iommu,const char * devname,int hwirq,irq_handler_t thread_fn) __iommu_setup_intcapxt() argument
2551 iommu_setup_intcapxt(struct amd_iommu * iommu) iommu_setup_intcapxt() argument
2582 iommu_init_irq(struct amd_iommu * iommu) iommu_init_irq() argument
2760 iommu_init_flags(struct amd_iommu * iommu) iommu_init_flags() argument
2791 iommu_apply_resume_quirks(struct amd_iommu * iommu) iommu_apply_resume_quirks() argument
2834 iommu_enable_ga(struct amd_iommu * iommu) iommu_enable_ga() argument
2850 iommu_disable_irtcachedis(struct amd_iommu * iommu) iommu_disable_irtcachedis() argument
2855 iommu_enable_irtcachedis(struct amd_iommu * iommu) iommu_enable_irtcachedis() argument
2877 iommu_enable_2k_int(struct amd_iommu * iommu) iommu_enable_2k_int() argument
2888 early_enable_iommu(struct amd_iommu * iommu) early_enable_iommu() argument
2913 struct amd_iommu *iommu; early_enable_iommus() local
2968 struct amd_iommu *iommu; enable_iommus_ppr() local
2981 struct amd_iommu *iommu; enable_iommus_vapic() local
3043 struct amd_iommu *iommu; disable_iommus() local
3061 struct amd_iommu *iommu; amd_iommu_resume() local
3343 struct amd_iommu *iommu; amd_iommu_enable_interrupts() local
3560 struct amd_iommu *iommu; state_next() local
3982 struct amd_iommu *iommu; get_amd_iommu() local
3999 struct amd_iommu *iommu = get_amd_iommu(idx); amd_iommu_pc_get_max_banks() local
4014 struct amd_iommu *iommu = get_amd_iommu(idx); amd_iommu_pc_get_max_counters() local
4022 iommu_pc_get_set_reg(struct amd_iommu * iommu,u8 bank,u8 cntr,u8 fxn,u64 * value,bool is_write) iommu_pc_get_set_reg() argument
4060 amd_iommu_pc_get_reg(struct amd_iommu * iommu,u8 bank,u8 cntr,u8 fxn,u64 * value) amd_iommu_pc_get_reg() argument
4068 amd_iommu_pc_set_reg(struct amd_iommu * iommu,u8 bank,u8 cntr,u8 fxn,u64 * value) amd_iommu_pc_set_reg() argument
4134 struct amd_iommu *iommu; amd_iommu_snp_disable() local
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| H A D | ppr.c | 9 #include <linux/amd-iommu.h>
13 #include <asm/iommu.h>
18 #include "../iommu-pages.h"
20 int __init amd_iommu_alloc_ppr_log(struct amd_iommu *iommu) in amd_iommu_alloc_ppr_log() argument
22 iommu->ppr_log = iommu_alloc_4k_pages(iommu, GFP_KERNEL | __GFP_ZERO, in amd_iommu_alloc_ppr_log()
24 return iommu->ppr_log ? 0 : -ENOMEM; in amd_iommu_alloc_ppr_log()
27 void amd_iommu_enable_ppr_log(struct amd_iommu *iommu) in amd_iommu_enable_ppr_log() argument
31 if (iommu->ppr_log == NULL) in amd_iommu_enable_ppr_log()
34 iommu_feature_enable(iommu, CONTROL_PPR_EN); in amd_iommu_enable_ppr_log()
36 entry = iommu_virt_to_phys(iommu->ppr_log); in amd_iommu_enable_ppr_log()
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| H A D | iommu.c | 23 #include <linux/iommu-helper.h>
25 #include <linux/amd-iommu.h>
39 #include <asm/iommu.h>
43 #include <linux/generic_pt/iommu.h>
48 #include "../iommu-pages.h"
67 * AMD IOMMU allows up to 2^16 different protection domains. This is a bitmap
75 static void set_dte_entry(struct amd_iommu *iommu,
84 static void iommu_flush_dte_sync(struct amd_iommu *iommu, u16 devid);
86 static struct iommu_dev_data *find_dev_data(struct amd_iommu *iommu, u16 devid);
91 static void clone_aliases(struct amd_iommu *iommu, struc
149 update_dte256(struct amd_iommu * iommu,struct iommu_dev_data * dev_data,struct dev_table_entry * new) update_dte256() argument
215 amd_iommu_update_dte(struct amd_iommu * iommu,struct iommu_dev_data * dev_data,struct dev_table_entry * new) amd_iommu_update_dte() argument
225 get_dte256(struct amd_iommu * iommu,struct iommu_dev_data * dev_data,struct dev_table_entry * dte) get_dte256() argument
315 get_dev_table(struct amd_iommu * iommu) get_dev_table() argument
345 amd_iommu_set_rlookup_table(struct amd_iommu * iommu,u16 devid) amd_iommu_set_rlookup_table() argument
377 alloc_dev_data(struct amd_iommu * iommu,u16 devid) alloc_dev_data() argument
395 search_dev_data(struct amd_iommu * iommu,u16 devid) search_dev_data() argument
416 struct amd_iommu *iommu; clone_alias() local
452 clone_aliases(struct amd_iommu * iommu,struct device * dev) clone_aliases() argument
470 setup_aliases(struct amd_iommu * iommu,struct device * dev) setup_aliases() argument
492 find_dev_data(struct amd_iommu * iommu,u16 devid) find_dev_data() argument
681 struct amd_iommu *iommu; check_device() local
704 iommu_init_device(struct amd_iommu * iommu,struct device * dev) iommu_init_device() argument
744 iommu_ignore_device(struct amd_iommu * iommu,struct device * dev) iommu_ignore_device() argument
768 dump_dte_entry(struct amd_iommu * iommu,u16 devid) dump_dte_entry() argument
789 amd_iommu_report_rmp_hw_error(struct amd_iommu * iommu,volatile u32 * event) amd_iommu_report_rmp_hw_error() argument
821 amd_iommu_report_rmp_fault(struct amd_iommu * iommu,volatile u32 * event) amd_iommu_report_rmp_fault() argument
860 amd_iommu_report_page_fault(struct amd_iommu * iommu,u16 devid,u16 domain_id,u64 address,int flags) amd_iommu_report_page_fault() argument
911 amd_iommu_report_ppr_err(struct amd_iommu * iommu,volatile u32 * event,u16 devid,u64 address,int flags) amd_iommu_report_ppr_err() argument
945 iommu_print_event(struct amd_iommu * iommu,void * __evt) iommu_print_event() argument
1039 iommu_poll_events(struct amd_iommu * iommu) iommu_poll_events() argument
1075 iommu_poll_ga_log(struct amd_iommu * iommu) iommu_poll_ga_log() argument
1115 amd_iommu_set_pci_msi_domain(struct device * dev,struct amd_iommu * iommu) amd_iommu_set_pci_msi_domain() argument
1126 amd_iommu_set_pci_msi_domain(struct device * dev,struct amd_iommu * iommu) amd_iommu_set_pci_msi_domain() argument
1134 struct amd_iommu *iommu = (struct amd_iommu *) data; amd_iommu_handle_irq() local
1212 dump_command_buffer(struct amd_iommu * iommu) dump_command_buffer() argument
1231 wait_on_sem(struct amd_iommu * iommu,u64 data) wait_on_sem() argument
1260 copy_cmd_to_buffer(struct amd_iommu * iommu,struct iommu_cmd * cmd) copy_cmd_to_buffer() argument
1279 build_completion_wait(struct iommu_cmd * cmd,struct amd_iommu * iommu,u64 data) build_completion_wait() argument
1410 __iommu_queue_command_sync(struct amd_iommu * iommu,struct iommu_cmd * cmd,bool sync) __iommu_queue_command_sync() argument
1447 iommu_queue_command_sync(struct amd_iommu * iommu,struct iommu_cmd * cmd,bool sync) iommu_queue_command_sync() argument
1461 iommu_queue_command(struct amd_iommu * iommu,struct iommu_cmd * cmd) iommu_queue_command() argument
1466 get_cmdsem_val(struct amd_iommu * iommu) get_cmdsem_val() argument
1476 iommu_completion_wait(struct amd_iommu * iommu) iommu_completion_wait() argument
1527 iommu_flush_dte(struct amd_iommu * iommu,u16 devid) iommu_flush_dte() argument
1536 iommu_flush_dte_sync(struct amd_iommu * iommu,u16 devid) iommu_flush_dte_sync() argument
1545 amd_iommu_flush_dte_all(struct amd_iommu * iommu) amd_iommu_flush_dte_all() argument
1560 amd_iommu_flush_tlb_all(struct amd_iommu * iommu) amd_iommu_flush_tlb_all() argument
1576 amd_iommu_flush_tlb_domid(struct amd_iommu * iommu,u32 dom_id) amd_iommu_flush_tlb_domid() argument
1597 struct amd_iommu *iommu = container_of(aviommu->core.iommu_dev, iommu_flush_pages_v1_hdom_ids() local
1615 amd_iommu_flush_all(struct amd_iommu * iommu) amd_iommu_flush_all() argument
1625 iommu_flush_irt(struct amd_iommu * iommu,u16 devid) iommu_flush_irt() argument
1634 amd_iommu_flush_irt_all(struct amd_iommu * iommu) amd_iommu_flush_irt_all() argument
1648 amd_iommu_flush_all_caches(struct amd_iommu * iommu) amd_iommu_flush_all_caches() argument
1665 struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data); device_flush_iotlb() local
1677 struct amd_iommu *iommu = data; device_flush_dte_alias() local
1687 struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data); device_flush_dte() local
1730 struct amd_iommu *iommu = get_amd_iommu_from_dev(dev_data->dev); domain_flush_pages_v2() local
1863 struct amd_iommu *iommu = get_amd_iommu_from_dev(dev_data->dev); amd_iommu_dev_flush_pasid_pages() local
1887 struct amd_iommu *iommu; __amd_iommu_complete_ppr() local
2002 setup_gcr3_table(struct gcr3_tbl_info * gcr3_info,struct amd_iommu * iommu,int pasids) setup_gcr3_table() argument
2199 set_dte_entry(struct amd_iommu * iommu,struct iommu_dev_data * dev_data,phys_addr_t top_paddr,unsigned int top_level) set_dte_entry() argument
2237 clear_dte_entry(struct amd_iommu * iommu,struct iommu_dev_data * dev_data) clear_dte_entry() argument
2248 struct amd_iommu *iommu = get_amd_iommu_from_dev(dev_data->dev); dev_update_dte() local
2263 struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data); init_gcr3_table() local
2310 pdom_attach_iommu(struct amd_iommu * iommu,struct protection_domain * pdom) pdom_attach_iommu() argument
2347 pdom_detach_iommu(struct amd_iommu * iommu,struct protection_domain * pdom) pdom_detach_iommu() argument
2378 struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data); attach_device() local
2440 struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data); detach_device() local
2490 struct amd_iommu *iommu; amd_iommu_probe_device() local
2611 amd_iommu_hd_support(struct amd_iommu * iommu) amd_iommu_hd_support() argument
2641 struct amd_iommu *iommu = rlookup_amd_iommu(dev_data->dev); amd_iommu_change_top() local
2862 struct amd_iommu *iommu = get_amd_iommu_from_dev(dev); amd_iommu_domain_alloc_paging_flags() local
2993 struct amd_iommu *iommu = get_amd_iommu_from_dev(dev); amd_iommu_attach_device() local
3041 struct amd_iommu *iommu = get_amd_iommu_from_dev(dev); amd_iommu_capable() local
3065 struct amd_iommu *iommu; amd_iommu_set_dirty_tracking() local
3104 struct amd_iommu *iommu; amd_iommu_get_resv_regions() local
3233 struct amd_iommu *iommu = data; iommu_flush_dev_irt() local
3240 iommu_flush_irt_and_complete(struct amd_iommu * iommu,u16 devid) iommu_flush_irt_and_complete() argument
3285 set_dte_irq_entry(struct amd_iommu * iommu,u16 devid,struct irq_remap_table * table) set_dte_irq_entry() argument
3307 get_irq_table(struct amd_iommu * iommu,u16 devid) get_irq_table() argument
3344 set_remap_table_entry(struct amd_iommu * iommu,u16 devid,struct irq_remap_table * table) set_remap_table_entry() argument
3359 struct amd_iommu *iommu = rlookup_amd_iommu(&pdev->dev); set_remap_table_entry_alias() local
3380 alloc_irq_table(struct amd_iommu * iommu,u16 devid,struct pci_dev * pdev,unsigned int max_irqs) alloc_irq_table() argument
3448 alloc_irq_index(struct amd_iommu * iommu,u16 devid,int count,bool align,struct pci_dev * pdev,unsigned long max_irqs) alloc_irq_index() argument
3495 __modify_irte_ga(struct amd_iommu * iommu,u16 devid,int index,struct irte_ga * irte) __modify_irte_ga() argument
3526 modify_irte_ga(struct amd_iommu * iommu,u16 devid,int index,struct irte_ga * irte) modify_irte_ga() argument
3540 modify_irte(struct amd_iommu * iommu,u16 devid,int index,union irte * irte) modify_irte() argument
3559 free_irte(struct amd_iommu * iommu,u16 devid,int index) free_irte() argument
3605 irte_activate(struct amd_iommu * iommu,void * entry,u16 devid,u16 index) irte_activate() argument
3613 irte_ga_activate(struct amd_iommu * iommu,void * entry,u16 devid,u16 index) irte_ga_activate() argument
3621 irte_deactivate(struct amd_iommu * iommu,void * entry,u16 devid,u16 index) irte_deactivate() argument
3629 irte_ga_deactivate(struct amd_iommu * iommu,void * entry,u16 devid,u16 index) irte_ga_deactivate() argument
3637 irte_set_affinity(struct amd_iommu * iommu,void * entry,u16 devid,u16 index,u8 vector,u32 dest_apicid) irte_set_affinity() argument
3647 irte_ga_set_affinity(struct amd_iommu * iommu,void * entry,u16 devid,u16 index,u8 vector,u32 dest_apicid) irte_ga_set_affinity() argument
3754 struct amd_iommu *iommu = data->iommu; irq_remapping_prepare_irte() local
3805 struct amd_iommu *iommu; irq_remapping_alloc() local
3946 struct amd_iommu *iommu = data->iommu; irq_remapping_activate() local
3963 struct amd_iommu *iommu = data->iommu; irq_remapping_deactivate() local
3973 struct amd_iommu *iommu; irq_remapping_select() local
4156 amd_ir_update_irte(struct irq_data * irqd,struct amd_iommu * iommu,struct amd_ir_data * ir_data,struct irq_2_irte * irte_info,struct irq_cfg * cfg) amd_ir_update_irte() argument
4178 struct amd_iommu *iommu = ir_data->iommu; amd_ir_set_affinity() local
4222 amd_iommu_create_irq_domain(struct amd_iommu * iommu) amd_iommu_create_irq_domain() argument
[all...] |
| H A D | amd_iommu.h | 10 #include <linux/iommu.h>
21 void amd_iommu_restart_log(struct amd_iommu *iommu, const char *evt_type,
24 void amd_iommu_restart_event_logging(struct amd_iommu *iommu);
25 void amd_iommu_restart_ga_log(struct amd_iommu *iommu);
26 void amd_iommu_restart_ppr_log(struct amd_iommu *iommu);
27 void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid);
28 void iommu_feature_enable(struct amd_iommu *iommu, u8 bit);
29 void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu,
64 int amd_iommu_iopf_init(struct amd_iommu *iommu);
65 void amd_iommu_iopf_uninit(struct amd_iommu *iommu);
[all …]
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| /linux/drivers/iommu/riscv/ |
| H A D | iommu.c | 3 * IOMMU API for RISC-V IOMMU implementations.
13 #define pr_fmt(fmt) "riscv-iommu: " fmt
20 #include <linux/iommu.h>
24 #include <linux/generic_pt/iommu.h>
26 #include "../iommu-pages.h"
27 #include "iommu-bits.h"
28 #include "iommu.h"
40 /* RISC-V IOMMU PPN <> PHYS address conversions, PHYS <=> PPN[53:10] */
45 iommu_get_iommu_dev(dev, struct riscv_iommu_device, iommu)
47 /* IOMMU PSCID allocation namespace. */
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| H A D | iommu.h | 14 #include <linux/iommu.h>
19 #include "iommu-bits.h"
30 struct riscv_iommu_device *iommu; /* iommu device handling the queue when active */ member
39 /* iommu core interface */
40 struct iommu_device iommu; member
42 /* iommu hardware */
67 int riscv_iommu_init(struct riscv_iommu_device *iommu);
68 void riscv_iommu_remove(struct riscv_iommu_device *iommu);
69 void riscv_iommu_disable(struct riscv_iommu_device *iommu);
71 #define riscv_iommu_readl(iommu, addr) \ argument
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| /linux/tools/testing/selftests/vfio/lib/ |
| H A D | iommu.c | 39 .container_path = "/dev/iommu",
44 .container_path = "/dev/iommu",
66 VFIO_FAIL("Unrecognized IOMMU mode: %s\n", iommu_mode); in lookup_iommu_mode()
69 int __iommu_hva2iova(struct iommu *iommu, void *vaddr, iova_t *iova) in __iommu_hva2iova() argument
73 list_for_each_entry(region, &iommu->dma_regions, link) { in __iommu_hva2iova()
89 iova_t iommu_hva2iova(struct iommu *iommu, void *vaddr) in iommu_hva2iova() argument
94 ret = __iommu_hva2iova(iommu, vaddr, &iova); in iommu_hva2iova()
95 VFIO_ASSERT_EQ(ret, 0, "%p is not mapped into the iommu\n", vaddr); in iommu_hva2iova()
100 static int vfio_iommu_map(struct iommu *iommu, struct dma_region *region) in vfio_iommu_map() argument
110 if (ioctl(iommu->container_fd, VFIO_IOMMU_MAP_DMA, &args)) in vfio_iommu_map()
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| /linux/Documentation/devicetree/bindings/iommu/ |
| H A D | iommu.txt | 5 IOMMU device node:
8 An IOMMU can provide the following services:
19 through the IOMMU and faulting when encountering accesses to unmapped
29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
31 master IOMMU devices can translate accesses from more than one master.
33 The device tree node of the IOMMU device's parent bus must contain a valid
35 IOMMU maps to memory. An empty "dma-ranges" property means that there is a
36 1:1 mapping from IOMMU to memory.
40 - #iommu-cells: The number of cells in an IOMMU specifier needed to encode an
43 The meaning of the IOMMU specifier is defined by the device tree binding of
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| H A D | qcom,iommu.yaml | 4 $id: http://devicetree.org/schemas/iommu/qcom,iommu.yaml#
7 title: Qualcomm Technologies legacy IOMMU implementations
14 a similar looking IOMMU, but without access to the global register space
23 - qcom,msm8916-iommu
24 - qcom,msm8917-iommu
25 - qcom,msm8937-iommu
26 - qcom,msm8953-iommu
27 - const: qcom,msm-iommu-v1
30 - qcom,msm8953-iommu
31 - qcom,msm8976-iommu
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| H A D | mediatek,iommu.yaml | 4 $id: http://devicetree.org/schemas/iommu/mediatek,iommu.yaml#
7 title: MediaTek IOMMU Architecture Implementation
77 - mediatek,mt6893-iommu-mm # generation two
81 - mediatek,mt8186-iommu-mm # generation two
82 - mediatek,mt8188-iommu-vdo # generation two
83 - mediatek,mt8188-iommu-vpp # generation two
84 - mediatek,mt8188-iommu-infra # generation two
85 - mediatek,mt8189-iommu-apu # generation two
86 - mediatek,mt8189-iommu-infra # generation two
87 - mediatek,mt8189-iommu-mm # generation two
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| H A D | sprd,iommu.yaml | 5 $id: http://devicetree.org/schemas/iommu/sprd,iommu.yaml#
8 title: Unisoc IOMMU and Multi-media MMU
16 - sprd,iommu-v1
18 "#iommu-cells":
21 Unisoc IOMMUs are all single-master IOMMU devices, therefore no
24 Documentation/devicetree/bindings/iommu/iommu.txt
37 - "#iommu-cells"
43 iommu_disp: iommu@63000800 {
44 compatible = "sprd,iommu-v1";
46 #iommu-cells = <0>;
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| /linux/tools/testing/selftests/vfio/lib/include/libvfio/ |
| H A D | iommu.h | 27 struct iommu { struct
35 struct iommu *iommu_init(const char *iommu_mode); argument
36 void iommu_cleanup(struct iommu *iommu);
38 int __iommu_map(struct iommu *iommu, struct dma_region *region);
40 static inline void iommu_map(struct iommu *iommu, struct dma_region *region) in iommu_map() argument
42 VFIO_ASSERT_EQ(__iommu_map(iommu, region), 0); in iommu_map()
45 int __iommu_unmap(struct iommu *iomm
28 modeiommu global() argument
30 iommufdiommu global() argument
47 iommu_unmap(struct iommu * iommu,struct dma_region * region) iommu_unmap() argument
54 iommu_unmap_all(struct iommu * iommu) iommu_unmap_all() argument
[all...] |
| /linux/Documentation/ABI/testing/ |
| H A D | debugfs-amd-iommu | 1 What: /sys/kernel/debug/iommu/amd/iommu<x>/mmio
6 MMIO register offset for iommu<x>, and the file outputs the corresponding
7 MMIO register value of iommu<x>
11 $ echo "0x18" > /sys/kernel/debug/iommu/amd/iommu00/mmio
12 $ cat /sys/kernel/debug/iommu/amd/iommu00/mmio
18 What: /sys/kernel/debug/iommu/amd/iommu<x>/capability
23 capability register offset for iommu<x>, and the file outputs the
24 corresponding capability register value of iommu<x>.
28 $ echo "0x10" > /sys/kernel/debug/iommu/amd/iommu00/capability
29 $ cat /sys/kernel/debug/iommu/amd/iommu00/capability
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| H A D | debugfs-intel-iommu | 1 What: /sys/kernel/debug/iommu/intel/iommu_regset
5 This file dumps all the register contents for each IOMMU device.
11 $ sudo cat /sys/kernel/debug/iommu/intel/iommu_regset
13 IOMMU: dmar0 Register Base Address: 26be37000
24 IOMMU: dmar1 Register Base Address: fed90000
35 IOMMU: dmar2 Register Base Address: fed91000
46 What: /sys/kernel/debug/iommu/intel/ir_translation_struct
57 $ sudo cat /sys/kernel/debug/iommu/intel/ir_translation_struct
59 Remapped Interrupt supported on IOMMU: dmar0
66 Remapped Interrupt supported on IOMMU: dmar1
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| H A D | sysfs-class-iommu-intel-iommu | 1 What: /sys/class/iommu/<iommu>/intel-iommu/address
6 Physical address of the VT-d DRHD for this IOMMU.
8 intel-iommu with a DMAR DRHD table entry.
10 What: /sys/class/iommu/<iommu>/intel-iommu/cap
18 What: /sys/class/iommu/<iommu>/intel-iommu/ecap
26 What: /sys/class/iommu/<iommu>/intel-iommu/version
|
| /linux/arch/sparc/mm/ |
| H A D | iommu.c | 3 * iommu.c: IOMMU specific routines for memory management.
26 #include <asm/iommu.h>
60 struct iommu_struct *iommu; in sbus_iommu_init() local
67 iommu = kmalloc_obj(struct iommu_struct); in sbus_iommu_init()
68 if (!iommu) { in sbus_iommu_init()
69 prom_printf("Unable to allocate iommu structure\n"); in sbus_iommu_init()
73 iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3, in sbus_iommu_init()
75 if (!iommu->regs) { in sbus_iommu_init()
76 prom_printf("Cannot map IOMMU registers\n"); in sbus_iommu_init()
80 control = sbus_readl(&iommu->regs->control); in sbus_iommu_init()
[all …]
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| /linux/Documentation/devicetree/bindings/virtio/ |
| H A D | pci-iommu.yaml | 4 $id: http://devicetree.org/schemas/virtio/pci-iommu.yaml#
7 title: virtio-iommu device using the virtio-pci transport
13 When virtio-iommu uses the PCI transport, its programming interface is
15 device tree statically describes the relation between IOMMU and DMA
16 masters. Therefore, the PCI root complex that hosts the virtio-iommu
17 contains a child node representing the IOMMU device explicitly.
19 DMA from the IOMMU device isn't managed by another IOMMU. Therefore the
20 virtio-iommu node doesn't have an "iommus" property, and is omitted from
21 the iommu-map property of the root complex.
33 - const: virtio,pci-iommu
[all …]
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| /linux/drivers/gpu/drm/msm/ |
| H A D | msm_iommu.c | 12 #include <asm/dma-iommu.h>
54 /* based on iommu_pgsize() in iommu.c: */
147 struct msm_iommu *iommu = to_msm_iommu(pagetable->parent); in msm_iommu_pagetable_map_prr() local
148 phys_addr_t phys = page_to_phys(iommu->prr_page); in msm_iommu_pagetable_map_prr()
233 struct msm_iommu *iommu = to_msm_iommu(pagetable->parent); in msm_iommu_pagetable_destroy() local
241 mutex_lock(&iommu->init_lock); in msm_iommu_pagetable_destroy()
242 if (--iommu->pagetables == 0) { in msm_iommu_pagetable_destroy()
247 __free_page(iommu->prr_page); in msm_iommu_pagetable_destroy()
248 iommu->prr_page = NULL; in msm_iommu_pagetable_destroy()
251 mutex_unlock(&iommu->init_lock); in msm_iommu_pagetable_destroy()
[all …]
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