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/linux/arch/powerpc/crypto/
H A Daesp10-ppc.pl121 my ($zero,$in0,$in1,$key,$rcon,$mask,$tmp)=map("v$_",(0..6));
172 lvx $in0,0,$inp
183 vperm $in0,$in0,$in1,$key # align [and byte swap in LE]
201 vperm $key,$in0,$in0,$mask # rotate-n-splat
202 vsldoi $tmp,$zero,$in0,12 # >>32
203 vperm $outtail,$in0,$in0,$outperm # rotate
210 vxor $in0,$in0,$tmp
212 vxor $in0,$in0,$tmp
214 vxor $in0,$in0,$tmp
216 vxor $in0,$in0,$key
[all …]
H A Daesp8-ppc.pl121 my ($zero,$in0,$in1,$key,$rcon,$mask,$tmp)=map("v$_",(0..6));
173 lvx $in0,0,$inp
184 vperm $in0,$in0,$in1,$key # align [and byte swap in LE]
202 vperm $key,$in0,$in0,$mask # rotate-n-splat
203 vsldoi $tmp,$zero,$in0,12 # >>32
204 vperm $outtail,$in0,$in0,$outperm # rotate
211 vxor $in0,$in0,$tmp
213 vxor $in0,$in0,$tmp
215 vxor $in0,$in0,$tmp
217 vxor $in0,$in0,$key
[all …]
/linux/arch/mips/crypto/
H A Dpoly1305-mips.pl76 my ($in0,$in1,$tmp0,$tmp1,$tmp2,$tmp3,$tmp4) = ($a4,$a5,$a6,$a7,$at,$t0,$t1);
134 ld $in0,0($inp)
141 dsllv $in0,$in0,$tmp0
146 dsrlv $in0,$in0,$tmp0
151 or $in0,$in0,$tmp3
155 ldl $in0,0+MSB($inp)
157 ldr $in0,0+LSB($inp)
162 dsbh $in0,$in0 # byte swap
164 dshd $in0,$in0
171 and $tmp1,$in0,$tmp0 # byte swap
[all …]
/linux/arch/arm64/crypto/
H A Daes-neon.S127 .macro sub_bytes_4x, in0, in1, in2, in3
128 sub v8.16b, \in0\().16b, v15.16b
129 tbl \in0\().16b, {v16.16b-v19.16b}, \in0\().16b
136 tbx \in0\().16b, {v20.16b-v23.16b}, v8.16b
143 tbx \in0\().16b, {v24.16b-v27.16b}, v8.16b
151 tbx \in0\().16b, {v28.16b-v31.16b}, v8.16b
158 .macro mul_by_x_2x, out0, out1, in0, in1, tmp0, tmp1, const
159 sshr \tmp0\().16b, \in0\().16b, #7
160 shl \out0\().16b, \in0\().16b, #1
169 .macro mul_by_x2_2x, out0, out1, in0, in1, tmp0, tmp1, const
[all …]
H A Daes-cipher-core.S20 .macro __pair1, sz, op, reg0, reg1, in0, in1e, in1d, shift
22 ubfiz \reg0, \in0, #2, #8
25 ubfx \reg0, \in0, #\shift, #8
49 .macro __pair0, sz, op, reg0, reg1, in0, in1e, in1d, shift
50 ubfx \reg0, \in0, #\shift, #8
56 .macro __hround, out0, out1, in0, in1, in2, in3, t0, t1, enc, sz, op
59 __pair\enc \sz, \op, w12, w13, \in0, \in1, \in3, 0
60 __pair\enc \sz, \op, w14, w15, \in1, \in2, \in0, 8
62 __pair\enc \sz, \op, \t0, \t1, \in3, \in0, \in2, 24
74 .macro fround, out0, out1, out2, out3, in0, in1, in2, in3, sz=2, op
[all …]
H A Dsha512-ce-core.S83 .macro dround, i0, i1, i2, i3, i4, rc0, rc1, in0, in1, in2, in3, in4
87 add v5.2d, v\rc0\().2d, v\in0\().2d
94 sha512su0 v\in0\().2d, v\in1\().2d
98 sha512su1 v\in0\().2d, v\in2\().2d, v5.2d
/linux/lib/
H A Dtest_memcat_p.c24 struct test_struct **in0, **in1, **out, **p; in test_memcat_p_init() local
27 in0 = kcalloc(INPUT_MAX, sizeof(*in0), GFP_KERNEL); in test_memcat_p_init()
28 if (!in0) in test_memcat_p_init()
36 in0[i] = kmalloc(sizeof(**in0), GFP_KERNEL); in test_memcat_p_init()
37 if (!in0[i]) in test_memcat_p_init()
42 kfree(in0[i]); in test_memcat_p_init()
48 in0[i]->num = r; in test_memcat_p_init()
50 in0[i]->magic = MAGIC; in test_memcat_p_init()
54 in0[i] = in1[i] = NULL; in test_memcat_p_init()
56 out = memcat_p(in0, in1); in test_memcat_p_init()
[all …]
/linux/arch/arm/crypto/
H A Daes-cipher-core.S42 .macro __hround, out0, out1, in0, in1, in2, in3, t3, t4, enc, sz, op, oldcpsr
43 __select \out0, \in0, 0
53 __select t1, \in0, 1
65 __select \t4, \in0, 3
92 .macro fround, out0, out1, out2, out3, in0, in1, in2, in3, sz=2, op, oldcpsr
93 __hround \out0, \out1, \in0, \in1, \in2, \in3, \out2, \out3, 1, \sz, \op
94 __hround \out2, \out3, \in2, \in3, \in0, \in1, \in1, \in2, 1, \sz, \op, \oldcpsr
97 .macro iround, out0, out1, out2, out3, in0, in1, in2, in3, sz=2, op, oldcpsr
98 __hround \out0, \out1, \in0, \in3, \in2, \in1, \out2, \out3, 0, \sz, \op
99 __hround \out2, \out3, \in2, \in1, \in0, \in3, \in1, \in0, 0, \sz, \op, \oldcpsr
H A Dghash-ce-core.S491 .macro enc_1x, in0 argument
493 veor \in0, \in0, e0
494 vst1.8 {\in0}, [r4]!
497 .macro dec_1x, in0 argument
499 veor e0, e0, \in0
503 .macro enc_4x, in0, in1, in2, in3
506 veor \in0, \in0, e0
511 vst1.8 {\in0-\in1}, [r4]!
515 .macro dec_4x, in0, in1, in2, in3
518 veor e0, e0, \in0
/linux/Documentation/devicetree/bindings/hwmon/
H A Dti,adc128d818.yaml31 Mode 0 - 7 single-ended voltage readings (IN0-IN6), 1 temperature
33 Mode 1 - 8 single-ended voltage readings (IN0-IN7), no temperature.
35 (IN0-IN1, IN3-IN2, IN4-IN5, IN7-IN6), 1 temperature reading (internal).
36 Mode 3 - 4 single-ended voltage readings (IN0-IN3), 2 pseudo-differential
H A Dti,lm87.yaml32 are configured as voltage input pins in0 and in5.
/linux/drivers/clk/
H A Dclk-k210.c340 * Set ACLK parent selector: 0 for IN0, 1 for PLL0.
398 * For PLL0, we need to re-parent ACLK to IN0 to keep the CPU cores and in k210_pll_enable_hw()
552 { /* .index = 0 for in0 */ }, in k210_register_pll()
576 /* PLL0 and PLL1 only have IN0 as parent */ in k210_register_plls()
588 /* PLL2 has IN0, PLL0 and PLL1 as parents */ in k210_register_plls()
645 * ACLK has IN0 and PLL0 as parents.
652 { /* .index = 0 for in0 */ }, in k210_register_aclk()
821 * All muxed clocks have IN0 and PLL0 as parents.
827 { /* .index = 0 for in0 */ }, in k210_register_mux_clk()
838 /* .index = 0 for in0 */ in k210_register_in0_child()
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dcanaan,k210-clk.yaml43 in0: oscillator {
54 clocks = <&in0>;
/linux/drivers/media/pci/ivtv/
H A Divtv-gpio.c21 * OUTPUT IN1 IN0 AM3 AM2 AM1 AM0
25 * IN1 IN0
54 * OUTPUT IN0 AM0 IN1 AM1 AM2 IN2 BR0 BR1
58 * IN0 IN1 IN2
/linux/Documentation/hwmon/
H A Dltc4282.rst42 attributes are read-only. Note that in0 and in1 are mutually exclusive. Enabling
51 in0_reset_history Write 1 to reset in0 history.
H A Ddme1737.rst94 in0: +5VTR (+5V standby) 0V - 6.64V
104 in0: +2.5V 0V - 3.32V
114 in0: +5VTR (+5V standby) 0V - 6.64V
124 in0: +2.5 0V - 3.32V
H A Dw83795.rst40 13 VSEN1 (VCORE1) 10h in0
99 10 VSEN1 (VCORE1) 10h in0
H A Dw83781d.rst155 0x000001 in0
370 - in0=r(0x20)*0.016
379 - in0=r(0x20)*0.016
388 - in0=r(0x20)*0.016
397 - in0=r(0x20)*0.016
H A Df71805f.rst69 need external resistors. An exception is in0, which is used to monitor
83 in0 VCC VCC3.3V int. int. 2.00 1.65 V
H A Dpowr1220.rst37 in0 VMON1
/linux/Documentation/iio/
H A Dad4695.rst70 reg = <0>; /* IN0 */
77 (*raw × scale*) will be the voltage present on the ``IN0`` pin relative to
/linux/arch/sh/boards/mach-sdk7786/
H A Dgpio.c19 "in0", "in1", "in2", "in3", "in4", "in5", "in6", "in7",
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-adc.yaml295 - 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4
296 - 19 channels, numbered from 0 to 18 (for in0..in18) on stm32mp13.
297 - 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and
/linux/Documentation/devicetree/bindings/iio/afe/
H A Dcurrent-sense-shunt.yaml53 channel@0 { /* IN0,IN1 differential */
/linux/drivers/acpi/riscv/
H A Dirq.c31 static int irqchip_cmp_func(const void *in0, const void *in1) in irqchip_cmp_func() argument
33 struct acpi_probe_entry *elem0 = (struct acpi_probe_entry *)in0; in irqchip_cmp_func()

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