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/linux/arch/riscv/kvm/
H A Daia_imsic.c12 #include <linux/irqchip/riscv-imsic.h>
34 struct imsic { struct
45 * 1) Hardware: IMSIC VS-file (vsfile_cpu >= 0)
46 * 2) Software: IMSIC SW-file (vsfile_cpu < 0)
49 /* IMSIC VS-file */
56 /* IMSIC SW-file */
427 /* We can only read clear if we have a IMSIC VS-file */ in imsic_vsfile_read()
497 /* We can only access register if we have a IMSIC VS-file */ in imsic_vsfile_rw()
501 /* Check IMSIC register iselect */ in imsic_vsfile_rw()
525 /* We can only zero-out if we have a IMSIC VS-file */ in imsic_vsfile_local_clear()
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H A Daia_device.c11 #include <linux/irqchip/riscv-imsic.h>
68 * VS-level IMSIC pages). in aia_config()
256 /* IMSIC base is required */ in aia_init()
270 /* Update HART index of the IMSIC based on IMSIC base */ in aia_init()
274 /* Initialize IMSIC for this VCPU */ in aia_init()
492 /* Update the IMSIC HW state before entering guest mode */ in kvm_riscv_vcpu_aia_update()
508 /* Reset the IMSIC context */ in kvm_riscv_vcpu_aia_reset()
537 /* Cleanup IMSIC context */ in kvm_riscv_vcpu_aia_deinit()
H A Daia.c13 #include <linux/irqchip/riscv-imsic.h>
586 * We release hgctrl->lock before notifying IMSIC in kvm_riscv_aia_disable()
591 /* Notify IMSIC */ in kvm_riscv_aia_disable()
629 * IMSIC guest files and number of bits in HGEIE in kvm_riscv_aia_init()
/linux/drivers/irqchip/
H A Dirq-riscv-aplic-msi.c13 #include <linux/irqchip/riscv-imsic.h>
197 * controller to be RISC-V AIA IMSIC controller. in aplic_msi_setup()
201 dev_err(dev, "IMSIC global config not found\n"); in aplic_msi_setup()
208 dev_err(dev, "IMSIC guest index bits big for APLIC LHXS\n"); in aplic_msi_setup()
215 dev_err(dev, "IMSIC hart index bits big for APLIC LHXW\n"); in aplic_msi_setup()
222 dev_err(dev, "IMSIC group index bits big for APLIC HHXW\n"); in aplic_msi_setup()
229 dev_err(dev, "IMSIC group index shift should be >= %d\n", in aplic_msi_setup()
235 dev_err(dev, "IMSIC group index shift big for APLIC HHXS\n"); in aplic_msi_setup()
258 * IMSIC and the IMSIC MSI domains are created later through in aplic_msi_setup()
H A Dirq-riscv-intc.c98 * (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) implement in riscv_intc_irq_eoi()
232 * interrupt controllers (such as PLIC, IMSIC and APLIC in riscv_intc_init()
H A Dirq-riscv-aplic-main.c10 #include <linux/irqchip/riscv-imsic.h>
/linux/arch/riscv/include/asm/
H A Dkvm_aia.h33 /* Number of group bits in IMSIC address */
36 /* Position of group bits in IMSIC address */
39 /* Number of hart bits in IMSIC address */
42 /* Number of guest bits in IMSIC address */
66 /* Guest physical address of IMSIC for this VCPU */
69 /* HART index of IMSIC extacted from guest physical address */
72 /* Internal state of IMSIC for this VCPU */
/linux/arch/riscv/include/uapi/asm/
H A Dkvm.h343 * 1) EMUL (aka Emulation): Trap-n-emulate IMSIC
344 * 2) HWACCEL (aka HW Acceleration): Virtualize IMSIC using IMSIC guest files
345 * 3) AUTO (aka Automatic): Virtualize IMSIC using IMSIC guest files whenever
378 * value of the IMSIC register (range 0x70-0xFF) whereas the higher order
/linux/include/linux/irqchip/
H A Driscv-imsic.h71 /* Per-CPU IMSIC addresses */
/linux/arch/riscv/mm/
H A Dcacheflush.c35 * S-IMSIC, so the fence ensures previous data writes "happen before" in flush_icache_all()
/linux/include/acpi/
H A Dactbl2.h1560 u64 imsic_addr; /* IMSIC base address */
1561 u32 imsic_size; /* IMSIC size */
1572 /* 25: RISC-V IMSIC */
/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt2735 Force the kernel to not use IMSIC software injected MSIs
2736 as IPIs. Intended for system where IMSIC is trap-n-emulated,
/linux/
H A DMAINTAINERS22386 F: drivers/irqchip/irq-riscv-imsic-*.c
22387 F: drivers/irqchip/irq-riscv-imsic-*.h
22390 F: include/linux/irqchip/riscv-imsic.h