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/linux/arch/riscv/kvm/
H A Daia_imsic.c12 #include <linux/irqchip/riscv-imsic.h>
33 struct imsic { struct
44 * 1) Hardware: IMSIC VS-file (vsfile_cpu >= 0)
45 * 2) Software: IMSIC SW-file (vsfile_cpu < 0)
48 /* IMSIC VS-file */
55 /* IMSIC SW-file */
426 /* We can only read clear if we have a IMSIC VS-file */ in imsic_vsfile_read()
496 /* We can only access register if we have a IMSIC VS-file */ in imsic_vsfile_rw()
500 /* Check IMSIC register iselect */ in imsic_vsfile_rw()
524 /* We can only zero-out if we have a IMSIC VS-file */ in imsic_vsfile_local_clear()
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H A Daia_device.c11 #include <linux/irqchip/riscv-imsic.h>
98 * VS-level IMSIC pages). in aia_config()
286 /* IMSIC base is required */ in aia_init()
300 /* Update HART index of the IMSIC based on IMSIC base */ in aia_init()
304 /* Initialize IMSIC for this VCPU */ in aia_init()
522 /* Update the IMSIC HW state before entering guest mode */ in kvm_riscv_vcpu_aia_update()
540 /* Reset the IMSIC context */ in kvm_riscv_vcpu_aia_reset()
571 /* Cleanup IMSIC context */ in kvm_riscv_vcpu_aia_deinit()
H A Daia.c13 #include <linux/irqchip/riscv-imsic.h>
623 * We release hgctrl->lock before notifying IMSIC in kvm_riscv_aia_disable()
628 /* Notify IMSIC */ in kvm_riscv_aia_disable()
666 * IMSIC guest files and number of bits in HGEIE in kvm_riscv_aia_init()
/linux/drivers/irqchip/
H A Dirq-riscv-imsic-state.c7 #define pr_fmt(fmt) "riscv-imsic: " fmt
22 #include "irq-riscv-imsic-state.h"
59 struct imsic_priv *imsic; variable
63 return imsic ? &imsic->global : NULL; in imsic_get_global_config()
101 * IMSIC EIEx and EIPx registers. These registers in __imsic_eix_update()
112 * The IMSIC EIEx and EIPx registers are indirectly in __imsic_eix_update()
135 for_each_set_bit(i, lpriv->dirty_bitmap, imsic->global.nr_ids + 1) { in __imsic_local_sync()
155 mlocal = per_cpu_ptr(imsic->global.local, mvec->cpu); in __imsic_local_sync()
169 struct imsic_local_priv *lpriv = this_cpu_ptr(imsic->lpriv); in imsic_local_sync_all()
173 bitmap_fill(lpriv->dirty_bitmap, imsic->global.nr_ids + 1); in imsic_local_sync_all()
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H A Dirq-riscv-imsic-platform.c7 #define pr_fmt(fmt) "riscv-imsic: " fmt
23 #include "irq-riscv-imsic-state.h"
31 global = &imsic->global; in imsic_cpu_page_phys()
61 local = per_cpu_ptr(imsic->global.local, vec->cpu); in imsic_irq_retrigger()
135 .name = "IMSIC",
317 if (!imsic || !imsic->fwnode) { in imsic_irqdomain_init()
322 if (imsic->base_domain) { in imsic_irqdomain_init()
323 pr_err("%pfwP: irq domain already created\n", imsic->fwnode); in imsic_irqdomain_init()
328 imsic->base_domain = irq_domain_create_tree(imsic->fwnode, in imsic_irqdomain_init()
329 &imsic_base_domain_ops, imsic); in imsic_irqdomain_init()
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H A Dirq-riscv-aplic-msi.c13 #include <linux/irqchip/riscv-imsic.h>
197 * controller to be RISC-V AIA IMSIC controller. in aplic_msi_setup()
201 dev_err(dev, "IMSIC global config not found\n"); in aplic_msi_setup()
208 dev_err(dev, "IMSIC guest index bits big for APLIC LHXS\n"); in aplic_msi_setup()
215 dev_err(dev, "IMSIC hart index bits big for APLIC LHXW\n"); in aplic_msi_setup()
222 dev_err(dev, "IMSIC group index bits big for APLIC HHXW\n"); in aplic_msi_setup()
229 dev_err(dev, "IMSIC group index shift should be >= %d\n", in aplic_msi_setup()
235 dev_err(dev, "IMSIC group index shift big for APLIC HHXS\n"); in aplic_msi_setup()
258 * IMSIC and the IMSIC MSI domains are created later through in aplic_msi_setup()
H A Dirq-riscv-imsic-state.h10 #include <linux/irqchip/riscv-imsic.h>
63 extern struct imsic_priv *imsic;
H A DMakefile103 obj-$(CONFIG_RISCV_IMSIC) += irq-riscv-imsic-state.o irq-riscv-imsic-early.o irq-riscv-imsic-platf…
H A Dirq-riscv-intc.c98 * (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) implement in riscv_intc_irq_eoi()
231 * interrupt controllers (such as PLIC, IMSIC and APLIC in riscv_intc_init()
H A Dirq-riscv-aplic-main.c10 #include <linux/irqchip/riscv-imsic.h>
/linux/arch/riscv/include/asm/
H A Dkvm_aia.h33 /* Number of group bits in IMSIC address */
36 /* Position of group bits in IMSIC address */
39 /* Number of hart bits in IMSIC address */
42 /* Number of guest bits in IMSIC address */
69 /* Guest physical address of IMSIC for this VCPU */
72 /* HART index of IMSIC extacted from guest physical address */
75 /* Internal state of IMSIC for this VCPU */
/linux/drivers/acpi/riscv/
H A Dirq.c41 * interrupt controller structures and IMSIC before APLIC. The interrupt
43 * the incremental order like RINTC(24)->IMSIC(25)->APLIC(26)->PLIC(27).
/linux/include/linux/irqchip/
H A Driscv-imsic.h72 /* Per-CPU IMSIC addresses */
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Driscv,aplic.yaml52 message signaled interrupt controller (IMSIC). If both "msi-parent" and
/linux/include/acpi/
H A Dactbl2.h1367 u64 imsic_addr; /* IMSIC base address */
1368 u32 imsic_size; /* IMSIC size */
1379 /* 25: RISC-V IMSIC */
/linux/
H A DMAINTAINERS20350 F: drivers/irqchip/irq-riscv-imsic-*.c
20351 F: drivers/irqchip/irq-riscv-imsic-*.h
20354 F: include/linux/irqchip/riscv-imsic.h