Home
last modified time | relevance | path

Searched +full:imcr0 +full:- +full:imcr83 (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnxp,s32g2-siul2-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/nxp,s32g2-siul2-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ghennadi Procopciuc <Ghennadi.Procopciuc@oss.nxp.com>
12 - Chester Lin <chester62515@gmail.com>
24 MSCR102-MSCR111, MSCR123-MSCR143, IMCR84-IMCR118 and IMCR398-IMCR429.
29 - nxp,s32g2-siul2-pinctrl
34 - MSCR (Multiplexed Signal Configuration Register)
37 - IMCR (Input Multiplexed Signal Configuration Register)
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Ds32g2.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 * Copyright 2017-2021, 2024 NXP
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
23 compatible = "arm,scmi-shmem";
[all …]
H A Ds32g3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright 2021-2024 NXP
7 * Andra-Teodora Ilie <andra.ilie@nxp.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <0x02>;
16 #size-cells = <0x02>;
19 #address-cells = <1>;
20 #size-cells = <0>;
22 cpu-map {
[all …]