xref: /linux/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml (revision 70dbb12e95ec7585c68cb3ceae971688915021e3) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare APB I2C Controller
8
9maintainers:
10  - Jarkko Nikula <jarkko.nikula@linux.intel.com>
11
12allOf:
13  - $ref: /schemas/i2c/i2c-controller.yaml#
14  - if:
15      properties:
16        compatible:
17          not:
18            contains:
19              const: mscc,ocelot-i2c
20    then:
21      properties:
22        reg:
23          maxItems: 1
24
25properties:
26  compatible:
27    oneOf:
28      - description: Generic Synopsys DesignWare I2C controller
29        const: snps,designware-i2c
30      - description: Microsemi Ocelot SoCs I2C controller
31        items:
32          - const: mscc,ocelot-i2c
33          - const: snps,designware-i2c
34      - description: Baikal-T1 SoC System I2C controller
35        const: baikal,bt1-sys-i2c
36      - description: T-HEAD TH1520 SoCs I2C controller
37        items:
38          - const: thead,th1520-i2c
39          - const: snps,designware-i2c
40
41  reg:
42    minItems: 1
43    items:
44      - description: DW APB I2C controller memory mapped registers
45      - description: |
46          ICPU_CFG:TWI_DELAY registers to setup the SDA hold time.
47          This registers are specific to the Ocelot I2C-controller.
48
49  interrupts:
50    maxItems: 1
51
52  clocks:
53    minItems: 1
54    items:
55      - description: I2C controller reference clock source
56      - description: APB interface clock source
57
58  clock-names:
59    minItems: 1
60    items:
61      - const: ref
62      - const: pclk
63
64  resets:
65    maxItems: 1
66
67  clock-frequency:
68    description: Desired I2C bus clock frequency in Hz
69    enum: [100000, 400000, 1000000, 3400000]
70    default: 400000
71
72  i2c-sda-hold-time-ns:
73    description: |
74      The property should contain the SDA hold time in nanoseconds. This option
75      is only supported in hardware blocks version 1.11a or newer or on
76      Microsemi SoCs.
77
78  i2c-scl-falling-time-ns:
79    description: |
80      The property should contain the SCL falling time in nanoseconds.
81      This value is used to compute the tLOW period.
82    default: 300
83
84  i2c-sda-falling-time-ns:
85    description: |
86      The property should contain the SDA falling time in nanoseconds.
87      This value is used to compute the tHIGH period.
88    default: 300
89
90  dmas:
91    items:
92      - description: TX DMA Channel
93      - description: RX DMA Channel
94
95  dma-names:
96    items:
97      - const: tx
98      - const: rx
99
100  snps,bus-capacitance-pf:
101    $ref: /schemas/types.yaml#/definitions/uint32
102    description:
103      This property indicates the bus capacitance in picofarads (pF).
104      This value is used to compute the tHIGH and tLOW periods for high speed
105      mode.
106    enum: [100, 400]
107    default: 100
108
109  snps,clk-freq-optimized:
110    description:
111      This property indicates whether the hardware reduce its clock frequency
112      by reducing the internal latency required to generate the high period and
113      low period of SCL line.
114    type: boolean
115
116unevaluatedProperties: false
117
118required:
119  - compatible
120  - reg
121  - interrupts
122
123examples:
124  - |
125    i2c@f0000 {
126      compatible = "snps,designware-i2c";
127      reg = <0xf0000 0x1000>;
128      interrupts = <11>;
129      clock-frequency = <400000>;
130    };
131  - |
132    i2c@1120000 {
133      compatible = "snps,designware-i2c";
134      reg = <0x1120000 0x1000>;
135      interrupts = <12 1>;
136      clock-frequency = <400000>;
137      i2c-sda-hold-time-ns = <300>;
138      i2c-sda-falling-time-ns = <300>;
139      i2c-scl-falling-time-ns = <300>;
140      snps,bus-capacitance-pf = <400>;
141      snps,clk-freq-optimized;
142    };
143  - |
144    i2c@2000 {
145      compatible = "snps,designware-i2c";
146      reg = <0x2000 0x100>;
147      #address-cells = <1>;
148      #size-cells = <0>;
149      clock-frequency = <400000>;
150      clocks = <&i2cclk>;
151      interrupts = <0>;
152
153      eeprom@64 {
154        compatible = "atmel,24c02";
155        reg = <0x64>;
156      };
157    };
158  - |
159    i2c@100400 {
160      compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
161      reg = <0x100400 0x100>, <0x198 0x8>;
162      pinctrl-0 = <&i2c_pins>;
163      pinctrl-names = "default";
164      interrupts = <8>;
165      clocks = <&ahb_clk>;
166    };
167...
168