Home
last modified time | relevance | path

Searched +full:hi +full:- +full:fi (Results 1 – 25 of 186) sorted by relevance

12345678

/freebsd/contrib/arm-optimized-routines/math/test/
H A Drunulp.sh5 # Copyright (c) 2019-2024, Arm Limited.
6 # SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
8 #set -x
9 set -eu
16 flags="${ULPFLAGS:--q}"
25 # Second and third argument: lo and hi bounds
27 IFS=',' read -ra LO <<< "$1"; shift
28 IFS=',' read -ra HI <<< "$1"; shift
29 ITV="${LO[0]} ${HI[0]}"
31 [[ "$i" -eq "0" ]] || ITV="$ITV x ${LO[$i]} ${HI[$i]}"
[all …]
/freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/
H A DX86.cpp1 //===- X86.cpp ------------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
19 /// IsX86_MMXType - Return true if this is an MMX type.
22 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && in IsX86_MMXType()
23 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && in IsX86_MMXType()
24 IRType->getScalarSizeInBits() != 64; in IsX86_MMXType()
33 if (IsMMXCons && Ty->isVectorTy()) { in X86AdjustInlineAsmType()
34 if (cast<llvm::VectorType>(Ty)->getPrimitiveSizeInBits().getFixedValue() != in X86AdjustInlineAsmType()
45 return llvm::FixedVectorType::get(Int1Ty, Ty->getScalarSizeInBits()); in X86AdjustInlineAsmType()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.cpp1 //=- LoongArchInstrInfo.cpp - LoongArch Instruction Information -*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
50 // VR->VR copies. in copyPhysReg()
58 // XR->XR copies. in copyPhysReg()
66 // GPR->CFR copy. in copyPhysReg()
73 // CFR->GPR copy. in copyPhysReg()
80 // CFR->CFR copy. in copyPhysReg()
87 // FPR->FPR copies. in copyPhysReg()
[all …]
/freebsd/bin/sh/tests/parser/
H A Dheredoc1.08 fi
12 hi
14 )" = hi'
17 ${$+hi}
19 )" = hi'
23 ${yy-hi}
25 )" = hi'
28 ${$+hi
31 )" = "hi
40 $(echo hi)
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMachineFunction.cpp1 //===-- MipsMachineFunctionInfo.cpp - Private data used for Mips -------
[all...]
H A DMips16ISelDAGToDAG.cpp1 //===-- Mips16ISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips16 ----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
35 #define DEBUG_TYPE "mips-isel"
39 if (!Subtarget->inMips16Mode()) in runOnMachineFunction()
47 SDNode *Lo = nullptr, *Hi = nullptr; in selectMULT() local
48 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0), in selectMULT()
49 N->getOperand(1)); in selectMULT()
54 Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InGlue); in selectMULT()
[all …]
H A DMipsCallLowering.cpp1 //===- MipsCallLowering.cpp ---------
146 int FI = MFI.CreateFixedObject(Size, Offset, true); getStackAddress() local
272 Register Hi = Unmerge.getReg(1); assignCustomValue() local
423 int FI = MFI.CreateFixedObject(RegSize, VaArgOffset, true); lowerFormalArguments() local
[all...]
H A DMipsBranchExpansion.cpp1 //===----------------------- MipsBranchExpansion.cpp ----------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 /// - it expands a branch or jump instruction into a long branch if its offset
13 /// - it inserts nops to prevent forbidden slot hazards.
34 /// FIXME: Fix pc-region jump instructions which cross 256MB segment boundaries.
73 //===----------------------------------------------------------------------===//
108 #define DEBUG_TYPE "mips-branch-expansion"
114 SkipLongBranch("skip-mips-long-branch", cl::init(false),
118 ForceLongBranch("force-mips-long-branch", cl::init(false),
[all …]
H A DMipsSEISelDAGToDAG.cpp1 //===-- MipsSEISelDAGToDAG.cpp - A Dag to Dag Inst Selector for MipsSE ----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
38 #define DEBUG_TYPE "mips-isel"
42 if (Subtarget->inMips16Mode()) in runOnMachineFunction()
79 uint64_t RegNum = RegIdx->getAsZExtVal(); in getMSACtrlReg()
106 for (MachineRegisterInfo::use_iterator U = MRI->use_begin(DstReg), in replaceUsesWithZeroReg()
107 E = MRI->use_end(); U != E;) { in replaceUsesWithZeroReg()
114 if (MI->isPHI() || MI->isRegTiedToDefOperand(OpNo) || MI->isPseudo()) in replaceUsesWithZeroReg()
[all …]
H A DMipsSEFrameLowering.cpp1 //===- MipsSEFrameLowering.cpp - Mips32/64 Frame Information --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
116 switch(I->getOpcode()) { in expandInstr()
168 // load $vr, FI in expandLoadCCond()
171 assert(I->getOperand(0).isReg() && I->getOperand(1).isFI()); in expandLoadCCond()
175 Register Dst = I->getOperand(0).getReg(), FI = I->getOperand(1).getIndex(); in expandLoadCCond() local
177 TII.loadRegFromStack(MBB, I, VR, FI, RC, &RegInfo, 0); in expandLoadCCond()
178 BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), Dst) in expandLoadCCond()
[all …]
H A DMipsISelLowering.cpp1 //===- MipsISelLowering.cpp - Mips DAG Lowering Implementation ------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
82 #define DEBUG_TYPE "mips-lower"
87 NoZeroDivCheck("mno-check-zero-division", cl::Hidden,
141 MipsFunctionInfo *FI = MF.getInfo<MipsFunctionInfo>(); in getGlobalReg() local
142 return DAG.getRegister(FI->getGlobalBaseReg(MF), Ty); in getGlobalReg()
148 return DAG.getTargetGlobalAddress(N->getGlobal(), SDLoc(N), Ty, 0, Flag); in getTargetNode()
154 return DAG.getTargetExternalSymbol(N->getSymbol(), Ty, Flag); in getTargetNode()
[all …]
/freebsd/bin/sh/tests/builtins/
H A Dtrap2.06 trap -- "$teststring" USR1
8 if [ "$teststring" != "-" ] && [ -z "$traps" ]; then
16 fi
17 trap - USR1
23 fi
27 runtest 'echo hi'
28 runtest "'echo' 'hi'"
36 while [ $i -le 127 ]; do
38 if [ $i -lt 48 ] || [ $i -gt 57 ]; then
40 fi
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1 //===-- LanaiISelLowering.cpp - Lanai DAG Lowering Implementation ---------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
55 #define DEBUG_TYPE "lanai-lower"
68 "lanai-constant-mul-threshold", cl::Hidden,
152 // statements. Re-evaluate this on new benchmarks. in LanaiTargetLowering()
160 MaxStoresPerMemset = 16; // For @llvm.memset -> sequence of stores in LanaiTargetLowering()
162 MaxStoresPerMemcpy = 16; // For @llvm.memcpy -> sequence of stores in LanaiTargetLowering()
164 MaxStoresPerMemmove = 16; // For @llvm.memmove -> sequence of stores in LanaiTargetLowering()
[all …]
H A DLanaiISelDAGToDAG.cpp1 //===-- LanaiISelDAGToDAG.cpp - A dag to dag inst selector for Lanai ------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
36 #define DEBUG_TYPE "lanai-isel"
37 #define PASS_NAME "Lanai DAG->DAG Pattern Instruction Selection"
39 //===----------------------------------------------------------------------===//
41 //===----------------------------------------------------------------------===//
43 //===----------------------------------------------------------------------===//
44 // LanaiDAGToDAGISel - Lanai specific code to select Lanai machine
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1 //===-- XCoreISelLowering.cpp - XCore DAG Lowering Implementation ---------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
42 #define DEBUG_TYPE "xcore-lower"
118 // Conversion of i64 -> double produces constantpool nodes in XCoreTargetLowering()
163 // We have target-specific dag combine patterns for the following nodes: in XCoreTargetLowering()
223 /// ReplaceNodeResults - Replace the results of node with an illegal result
228 switch (N->getOpcode()) { in ReplaceNodeResults()
238 //===----------------------------------------------------------------------===//
[all …]
/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/usdt/
H A Dtst.header.ksh29 echo expected one argument: '<'dtrace-path'>'
31 fi
48 $dtrace -h -s prov.d
49 if [ $? -ne 0 ]; then
50 print -u2 "failed to generate header file"
52 fi
63 TEST_PROV_U_NDER("hi there");
68 cc -c test.c
69 if [ $? -ne 0 ]; then
70 print -u2 "failed to compile test.c"
[all …]
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCExpr.cpp1 //===- MCExpr.cpp - Assembly Level Expression Implementation --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 #include "llvm/Config/llvm-config.h"
43 return cast<MCTargetExpr>(this)->printImpl(OS, MAI); in print()
48 if (Value < 0 && MAI && !MAI->supportsSignedData()) in print()
77 bool UseParens = MAI && MAI->useParensForDollarSignNames() && !InParens && in print()
89 if (MAI && MAI->useParensForSymbolVariant()) // ARM in print()
102 case MCUnaryExpr::Minus: OS << '-'; break; in print()
106 bool Binary = UE.getSubExpr()->getKind() == MCExpr::Binary; in print()
[all …]
H A DMCStreamer.cpp1 //===- lib/MC/MCStreamer.cpp - Streaming Machine Code Output --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
62 Section->printSwitchToSection(*Streamer.getContext().getAsmInfo(), in changeSection()
75 Value->print(OS, Streamer.getContext().getAsmInfo()); in emitValue()
81 const char *Directive = MAI->getData8bitsDirective(); in emitRawBytes()
126 for (auto &FI : DwarfFrameInfos) in generateCompactUnwindEncodings() local
127 FI.CompactUnwindEncoding = in generateCompactUnwindEncodings()
128 (MAB ? MAB->generateCompactUnwindEncoding(&FI, &Context) : 0); in generateCompactUnwindEncodings()
131 /// EmitIntValue - Special case of EmitValue that avoids the client having to
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp1 //===-- CSKYISelLowering.cpp - CSKY DAG Lowering Implementation ----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
28 #define DEBUG_TYPE "csky-isel-lowering"
268 int FI = MFI.CreateFixedObject(ValVT.getSizeInBits() / 8, in unpackFromMemLoc() local
270 SDValue FIN = DAG.getFrameIndex(FI, PtrVT); in unpackFromMemLoc()
284 MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FI), ValVT); in unpackFromMemLoc()
299 int FI = MFI.CreateFixedObject(8, VA.getLocMemOffset(), /*Immutable=*/true); in unpack64() local
300 SDValue FIN = DAG.getFrameIndex(FI, MVT::i32); in unpack64()
[all …]
/freebsd/contrib/one-true-awk/testdir/
H A DT.misc5 awk=${awk-../a.out}
7 rm -f core
23 cmp -s foo1 foo2 || echo 'BAD: T.misc ghosh RE bug'
30 cmp -s foo1 foo2 || echo 'BAD: T.misc last number bug'
35 cmp -s foo1 foo2 || echo 'BAD: T.misc hex string cvt'
39 cmp -s foo1 foo2 || echo 'BAD: T.misc oct string cvt'
45 cmp -s foo1 foo2 || echo 'BAD: T.misc bad field increment'
47 # makes sure that fields are recomputed even if self-assignment
55 $awk '{ NF -= 2; $1 = $1; print }' <foo >foo2
56 diff foo1 foo2 || echo 1>&2 "BAD: T.misc bad field self-assignment"
[all …]
/freebsd/contrib/dialog/samples/
H A Dgauge26 . ./setup-vars
23 $DIALOG --title "GAUGE" "$@" --gauge "Hi, this is a gauge widget" 10 40 0
28 fi
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.h1 //===-- VEISelLowering.h - VE DAG Lowering Interface -------
42 Hi, // Hi/Lo operations, typically on a global address. global() enumerator
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1 //===-- M68kISelLowering.cpp - M68k DAG Lowering Impl -----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
42 #define DEBUG_TYPE "M68k-isel"
55 setStackPointerRegisterToSaveRestore(RegInfo->getStackRegister()); in M68kTargetLowering()
159 // We lower the `atomic-compare-and-swap` to `__sync_val_compare_and_swap` in M68kTargetLowering()
167 // M68k does not have native read-modify-write support, so expand all of them in M68kTargetLowering()
313 cast<VTSDNode>(TruncInput.getOperand(1))->getVT() == in MatchingStackOffset()
322 int FI = INT_MAX; in MatchingStackOffset() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DErlangGCPrinter.cpp1 //===- ErlangGCPrinter.cpp - Erlang/OTP frametable emitter ----------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
40 X("erlang", "erlang-compatible garbage collector");
52 for (GCModuleInfo::FuncInfoVec::iterator FI = Info.funcinfo_begin(), in finishAssembly() local
54 FI != IE; ++FI) { in finishAssembly()
55 GCFunctionInfo &MD = **FI; in finishAssembly()
83 AP.emitLabelPlusOffset(Label /*Hi*/, 0 /*Offset*/, 4 /*Size*/); in finishAssembly()
87 // first call-site. in finishAssembly()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1 //===-- SparcISelLowering.cpp - Sparc DAG Lowering Implementation ---------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
40 //===----------------------------------------------------------------------===//
42 //===----------------------------------------------------------------------===//
106 // Allocate a full-sized argument for the 64-bit ABI.
112 "Can't handle non-64 bits locations"); in Analyze_CC_Sparc64_Full()
121 // Promote integers to %i0-%i5. in Analyze_CC_Sparc64_Full()
124 // Promote doubles to %d0-%d30. (Which LLVM calls D0-D15). in Analyze_CC_Sparc64_Full()
[all …]

12345678