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/linux/Documentation/devicetree/bindings/phy/
H A Drealtek,usb2phy.yaml96 realtek,inverse-hstx-sync-clock:
148 realtek,inverse-hstx-sync-clock: false
172 realtek,inverse-hstx-sync-clock;
/linux/include/dt-bindings/phy/
H A Dphy-qcom-qusb2.h9 /* PHY HSTX TRIM bit values (24mA to 15mA) */
/linux/Documentation/devicetree/bindings/display/msm/
H A Ddsi-phy-10nm.yaml64 for the HSTX drive. Use supported levels (mV) to offset the drive level
/linux/arch/arm64/boot/dts/qcom/
H A Dsdm850-samsung-w737.dts607 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
635 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
H A Dsdm845-mtp.dts736 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
770 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
H A Dsdm850-lenovo-yoga-c630.dts824 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
856 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
H A Dsdm845-samsung-starqltechn.dts409 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
H A Dsdm845-xiaomi-beryllium-common.dtsi566 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
H A Dsdm845-lg-common.dtsi539 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
H A Dsdm845-xiaomi-polaris.dts664 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
H A Dsdm845-oneplus-common.dtsi791 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
H A Dmsm8996.dtsi759 qusb2p_hstx_trim: hstx-trim@24e {
764 qusb2s_hstx_trim: hstx-trim@24f {
H A Dqcm2290.dtsi758 qusb2_hstx_trim: hstx-trim@25b {
H A Dsdm630.dtsi588 qusb2_hstx_trim: hstx-trim@240 {
H A Dsm6115.dtsi957 qusb2_hstx_trim: hstx-trim@25b {
H A Dmsm8998.dtsi855 qusb2_hstx_trim: hstx-trim@23a {
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qusb2.c1021 dev_dbg(dev, "failed to lookup tune2 hstx trim value\n"); in qusb2_phy_probe()
1042 if (!of_property_read_u32(dev->of_node, "qcom,hstx-trim-value", in qusb2_phy_probe()
/linux/drivers/gpu/drm/bridge/cadence/
H A Dcdns-dsi-core.c820 * HSTX and LPRX timeouts are both expressed in TX byte clk cycles and in cdns_dsi_bridge_enable()
/linux/drivers/gpu/drm/vc4/
H A Dvc4_dsi.c1517 DSI_PORT_BIT(INT_HSTX_TO), "HSTX timeout"); in vc4_dsi_irq_handler()