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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmtk-sd.txt38 - assigned-clock-parents: parent of source clock, used for HS400 mode to get 400Mhz source clock
39 - hs400-ds-delay: HS400 DS delay setting
43 - mediatek,hs400-cmd-int-delay: HS400 command internal delay setting
46 - mediatek,hs400-cmd-resp-sel-rising: HS400 command response sample selection
47 If present,HS400 command responses are sampled on rising edges.
48 If not present,HS400 command responses are sampled on falling edges.
71 hs400-ds-delay = <0x14015>;
73 mediatek,hs400-cmd-int-delay = <14>;
74 mediatek,hs400-cmd-resp-sel-rising;
H A Dmtk-sd.yaml94 hs400-ds-delay:
97 HS400 DS delay setting.
110 mediatek,hs400-cmd-int-delay:
113 HS400 command internal delay setting.
119 mediatek,hs400-cmd-resp-sel-rising:
122 HS400 command response sample selection.
123 If present, HS400 command responses are sampled on rising edges.
124 If not present, HS400 command responses are sampled on falling edges.
126 mediatek,hs400-ds-dly3:
134 value with corner IC and it is valid only for HS400 mod
[all...]
H A Dnvidia,tegra20-sdhci.txt79 - nvidia,pad-autocal-pull-up-offset-hs400,
80 nvidia,pad-autocal-pull-down-offset-hs400 : Specify drive strength
81 calibration offsets for HS400 mode.
86 - nvidia,dqs-trim : Specify DQS trim value for HS400 timing
94 - The SDR104 and HS400 timing specific values are used in
104 HS400 timing. Only SDMMC4 on Tegra210 and Tegra 186 supports
105 HS400.
H A Dnvidia,tegra20-sdhci.yaml100 The DQS trim values are only used on controllers which support HS400
101 timing. Only SDMMC4 on Tegra210 and Tegra186 supports HS400.
109 description: Specify DQS trim value for HS400 timing.
136 nvidia,pad-autocal-pull-down-offset-hs400:
137 description: Specify drive strength calibration offsets for HS400 mode.
158 and HS400 timing specific values are used in corresponding modes if
171 nvidia,pad-autocal-pull-up-offset-hs400:
172 description: Specify drive strength calibration offsets for HS400 mode.
H A Dmmc-controller.yaml215 mmc-hs400-1_2v:
218 eMMC HS400 mode (1.2V I/O) is supported.
220 mmc-hs400-1_8v:
223 eMMC HS400 mode (1.8V I/O) is supported.
225 mmc-hs400-enhanced-strobe:
228 eMMC HS400 enhanced strobe mode is supported
230 no-mmc-hs400:
233 All eMMC HS400 modes are not supported.
H A Dsamsung,exynos-dw-mshc.yaml70 See also samsung,dw-mshc-hs400-timing property.
72 samsung,dw-mshc-hs400-timing:
82 The value of CIU TX and RX clock phase shift value for HS400 mode
104 See also samsung,dw-mshc-hs400-timing property.
109 RCLK (Data strobe) delay to control HS400 mode (Latency value for delay
H A Dexynos-dw-mshc.txt41 * samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase
42 shift value for hs400 mode operation.
57 * samsung,read-strobe-delay: RCLK (Data strobe) delay to control HS400 mode
91 samsung,dw-mshc-hs400-timing = <0 2>;
H A Dcdns,sdhci.yaml95 HS200, HS400 and HS400_ES.
102 Value of the delay introduced on the sdclk output for HS200, HS400 and
111 HS400 / HS400_ES speed modes.
154 mmc-hs400-1_8v;
H A Dsdhci-am654.txt32 - ti,otap-del-sel-hs400
41 - ti,strobe-sel: strobe select delay for HS400 speed mode. Default value: 0x0.
59 ti,otap-del-sel-hs400 = <0x0>;
H A Dsdhci-sprd.txt40 - sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing.
41 - sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing.
H A Dsprd,sdhci-r11.yaml99 mmc-hs400-enhanced-strobe;
100 mmc-hs400-1_8v;
109 sprd,phy-delay-mmc-hs400 = <0x44 0x7f 0x2e 0x2e>;
H A Dsdhci-am654.yaml121 ti,otap-del-sel-hs400:
122 description: Output tap delay for eMMC HS400 timing
190 description: strobe select delay for HS400 speed mode.
236 ti,otap-del-sel-hs400 = <0x0>;
H A Dbrcm,sdhci-brcmstb.txt39 mmc-hs400-1_8v;
40 mmc-hs400-enhanced-strobe;
H A Dbrcm,sdhci-brcmstb.yaml109 mmc-hs400-1_8v;
110 mmc-hs400-enhanced-strobe;
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos7885-jackpotlte.dts67 mmc-hs400-1_8v;
70 mmc-hs400-enhanced-strobe;
77 samsung,dw-mshc-hs400-timing = <0 2>;
H A Dexynos850-e850-96.dts185 mmc-hs400-1_8v;
188 mmc-hs400-enhanced-strobe;
195 samsung,dw-mshc-hs400-timing = <0 2>;
/freebsd/sys/dev/sdhci/
H A Dsdhci_fsl_fdt.c166 * In HS400 mode only 4, 8, 12 clock dividers can be used.
178 * HS400 tuning is done in HS200 mode, but it has to be done using
338 * According to limited clock division erratum, clock dividers in hs400 in fsl_sdhc_fdt_set_clock()
534 * Switching to HS400 requires a special procedure, in sdhci_fsl_fdt_write_2()
1143 device_t child, bool hs400, uint32_t wnd_start, uint32_t wnd_end) in sdhci_fsl_sw_tuning() argument
1180 error = sdhci_generic_tune(bus, child, hs400); in sdhci_fsl_sw_tuning()
1190 sdhci_fsl_fdt_tune(device_t bus, device_t child, bool hs400) in sdhci_fsl_fdt_tune() argument
1215 if (hs400) in sdhci_fsl_fdt_tune()
1263 error = sdhci_generic_tune(bus, child, hs400); in sdhci_fsl_fdt_tune()
1286 error = sdhci_fsl_sw_tuning(sc, bus, child, hs400, wnd_start, in sdhci_fsl_fdt_tune()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt7986a-bananapi-bpi-r3-emmc.dtso19 mmc-hs400-1_8v;
20 hs400-ds-delay = <0x14014>;
/freebsd/sys/dev/mmc/
H A Dmmc_helpers.c78 if (device_has_property(dev, "mmc-hs400-1_2v")) in mmc_parse_mmc_speed()
80 if (device_has_property(dev, "mmc-hs400-1_8v")) in mmc_parse_mmc_speed()
82 if (device_has_property(dev, "mmc-hs400-enhanced-strobe")) in mmc_parse_mmc_speed()
H A Dmmc.c527 case MMC_ERR_BADCRC: /* Switch failure on HS400 recovery */ in mmc_wait_for_request()
1502 return ("HS400"); in mmc_timing_to_string()
1504 return ("HS400 with enhanced strobe"); in mmc_timing_to_string()
2117 bool changed, hs400; in mmc_calculate_clock() local
2154 * HS400 must be tuned in HS200 mode, so in case of HS400 we begin in mmc_calculate_clock()
2159 * speed mode as does HS400 (see mmc_switch_to_hs400()). in mmc_calculate_clock()
2161 hs400 = max_timing == bus_timing_mmc_hs400; in mmc_calculate_clock()
2162 timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing; in mmc_calculate_clock()
2175 if (timing == bus_timing_mmc_hs200 || /* includes HS400 */ in mmc_calculate_clock()
2184 if (timing == bus_timing_mmc_hs200) { /* includes HS400 */ in mmc_calculate_clock()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dipq9574-al02-c7.dts37 mmc-hs400-1_8v;
38 mmc-hs400-enhanced-strobe;
H A Dipq9574-rdp433.dts23 mmc-hs400-1_8v;
24 mmc-hs400-enhanced-strobe;
H A Dipq9574-rdp418.dts24 mmc-hs400-1_8v;
25 mmc-hs400-enhanced-strobe;
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3399-nanopc-t4.dts113 mmc-hs400-1_8v;
114 mmc-hs400-enhanced-strobe;
/freebsd/sys/contrib/device-tree/src/arm64/sprd/
H A Dwhale2.dtsi151 sprd,phy-delay-mmc-hs400 = <0x44 0x7f 0x2e 0x2e>;
161 mmc-hs400-enhanced-strobe;
162 mmc-hs400-1_8v;

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