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/linux/Documentation/devicetree/bindings/mmc/
H A Dsprd,sdhci-r11.yaml101 mmc-hs200-1_8v;
108 sprd,phy-delay-mmc-hs200 = <0x0 0x8c 0x8c 0x8c>;
H A Dmmc-controller-common.yaml205 mmc-hs200-1_2v:
208 eMMC HS200 mode (1.2V I/O) is supported.
210 mmc-hs200-1_8v:
213 eMMC HS200 mode (1.8V I/O) is supported.
H A Dmtk-sd.yaml105 mediatek,hs200-cmd-int-delay:
108 HS200 command internal delay setting.
400 mediatek,hs200-cmd-int-delay = <26>;
H A Damlogic,meson-mx-sdhc.yaml18 It supports eMMC spec 4.4x/4.5x including HS200 (up to 100MHz clock).
/linux/arch/riscv/boot/dts/starfive/
H A Djh7110-milkv-marscm-emmc.dts18 mmc-hs200-1_8v;
H A Djh7110-starfive-visionfive-2.dtsi44 mmc-hs200-1_8v;
H A Djh7110-milkv-mars.dts29 mmc-hs200-1_8v;
H A Djh7110-deepcomputing-fml13v01.dts18 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-emmc.dtso18 mmc-hs200-1_8v;
H A Dmt7988a-bananapi-bpi-r4-pro-emmc.dtso21 mmc-hs200-1_8v;
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-tinker-s.dts22 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-tinker-board-3s.dts23 mmc-hs200-1_8v;
H A Drk3566-anbernic-rg-arc-d.dts52 mmc-hs200-1_8v;
H A Drk3566-radxa-zero-3w.dts59 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/renesas/
H A Drzv2-evk-cn15-emmc.dtso46 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/qcom/
H A Dipq5332-rdp474.dts28 mmc-hs200-1_8v;
H A Dipq5332-rdp468.dts44 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/freescale/
H A Dtqmls10xxa.dtsi61 mmc-hs200-1_8v;
H A Dfsl-ls1012a-rdb.dts37 mmc-hs200-1_8v;
H A Ds32g274a-rdb2.dts71 * However, this is not enough to enable HS400 or HS200 modes for eMMC.
/linux/arch/riscv/boot/dts/sophgo/
H A Dcv1812h-huashan-pi.dts52 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h618-longan-module-3h.dtsi27 mmc-hs200-1_8v;
/linux/arch/loongarch/boot/dts/
H A Dloongson-2k2000-ref.dts47 mmc-hs200-1_8v;
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2711-rpi-cm4.dtsi53 mmc-hs200-1_8v;
/linux/drivers/mmc/core/
H A Dmmc.c1202 pr_err("%s: switch to high-speed from hs200 failed, err:%d\n", in mmc_select_hs400()
1322 /* Switch HS to HS200 */ in mmc_hs400_to_hs200()
1334 * For HS200, CRC errors are not a reliable way to know the switch in mmc_hs400_to_hs200()
1474 * For device supporting HS200 mode, the following sequence
1477 * 2. switch to HS200 mode
1502 * switch to HS200 mode if bus width is set successfully. in mmc_select_hs200()
1518 * NB: We can't move to full (HS200) speeds until after we've in mmc_select_hs200()
1527 * For HS200, CRC errors are not a reliable way to know the in mmc_select_hs200()
1555 * Activate High Speed, HS200 or HS400ES mode if supported.
1595 * conditions for HS200 and HS400, which sends CMD21 to the device.

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