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/linux/Documentation/devicetree/bindings/mmc/
H A Dsprd,sdhci-r11.yaml101 mmc-hs200-1_8v;
108 sprd,phy-delay-mmc-hs200 = <0x0 0x8c 0x8c 0x8c>;
H A Dsdhci-am654.yaml115 ti,otap-del-sel-hs200:
116 description: Output tap delay for eMMC HS200 timing
235 ti,otap-del-sel-hs200 = <0x5>;
H A Dmtk-sd.yaml104 mediatek,hs200-cmd-int-delay:
107 HS200 command internal delay setting.
370 mediatek,hs200-cmd-int-delay = <26>;
H A Damlogic,meson-mx-sdhc.yaml18 It supports eMMC spec 4.4x/4.5x including HS200 (up to 100MHz clock).
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-emmc.dtso18 mmc-hs200-1_8v;
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-tinker-s.dts22 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30-cobra.dtsi124 * For hs200 support, U-Boot would have to set the RK809 DCDC4
126 * devices out in the field, so disable hs200.
127 * mmc-hs200-1_8v;
H A Dpx30-pp1516.dtsi152 * For hs200 support, U-Boot would have to set the RK809 DCDC4
154 * devices out in the field, so disable hs200.
155 * mmc-hs200-1_8v;
H A Drk3328-nanopi-r2s-plus.dts26 mmc-hs200-1_8v;
H A Drk3566-anbernic-rg-arc-d.dts52 mmc-hs200-1_8v;
H A Drk3566-radxa-zero-3w.dts59 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/qcom/
H A Dipq5332-rdp474.dts28 mmc-hs200-1_8v;
H A Dipq9574-rdp418.dts23 mmc-hs200-1_8v;
H A Dipq5332-rdp442.dts42 mmc-hs200-1_8v;
H A Dipq5332-rdp468.dts44 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/freescale/
H A Dtqmls10xxa.dtsi53 mmc-hs200-1_8v;
H A Ds32g274a-rdb2.dts50 * However, this is not enough to enable HS400 or HS200 modes for eMMC.
H A Dfsl-lx2162a-sr-som.dtsi27 mmc-hs200-1_8v;
H A Dfsl-ls1012a-rdb.dts37 mmc-hs200-1_8v;
H A Dfsl-lx2160a-tqmlx2160a.dtsi34 mmc-hs200-1_8v;
/linux/arch/riscv/boot/dts/sophgo/
H A Dcv1812h-huashan-pi.dts52 mmc-hs200-1_8v;
/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs-polarberry.dts67 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi152 sprd,phy-delay-mmc-hs200 = <0x0 0x8c 0x8c 0x8c>;
163 mmc-hs200-1_8v;
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h618-longan-module-3h.dtsi27 mmc-hs200-1_8v;
/linux/drivers/mmc/core/
H A Dmmc.c1189 pr_err("%s: switch to high-speed from hs200 failed, err:%d\n", in mmc_select_hs400()
1309 /* Switch HS to HS200 */ in mmc_hs400_to_hs200()
1321 * For HS200, CRC errors are not a reliable way to know the switch in mmc_hs400_to_hs200()
1459 * For device supporting HS200 mode, the following sequence
1462 * 2. switch to HS200 mode
1487 * switch to HS200 mode if bus width is set successfully. in mmc_select_hs200()
1503 * NB: We can't move to full (HS200) speeds until after we've in mmc_select_hs200()
1512 * For HS200, CRC errors are not a reliable way to know the in mmc_select_hs200()
1540 * Activate High Speed, HS200 or HS400ES mode if supported.
1580 * conditions for HS200 and HS400, which sends CMD21 to the device.

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