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/linux/Documentation/devicetree/bindings/phy/
H A Dhisilicon,phy-hi3670-pcie.yaml75 <&crg_ctrl HI3670_PCLK_GATE_PCIE_SYS>,
/linux/include/dt-bindings/clock/
H A Dhi3670-clock.h172 #define HI3670_PCLK_GATE_PCIE_SYS 150 macro
/linux/drivers/clk/hisilicon/
H A Dclk-hi3670.c152 { HI3670_PCLK_GATE_PCIE_SYS, "pclk_gate_pcie_sys", "clk_div_mmc1bus",