| /freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
| H A D | hdmi.txt | 1 Qualcomm adreno/snapdragon hdmi output
5 * "qcom,hdmi-tx-8996"
6 * "qcom,hdmi-tx-8994"
7 * "qcom,hdmi-tx-8084"
8 * "qcom,hdmi-tx-8974"
9 * "qcom,hdmi-tx-8660"
10 * "qcom,hdmi-tx-8960"
13 - interrupts: The interrupt signal from the hdmi block.
18 - hdmi-mux-supply: phandle to mux regulator
19 - phys: the phandle for the HDMI PHY device
[all …]
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| H A D | hdmi.yaml | 5 $id: http://devicetree.org/schemas/display/msm/hdmi.yaml#
8 title: Qualcomm Adreno/Snapdragon HDMI output
16 - qcom,hdmi-tx-8084
17 - qcom,hdmi-tx-8660
18 - qcom,hdmi-tx-8960
19 - qcom,hdmi-tx-8974
20 - qcom,hdmi-tx-8994
21 - qcom,hdmi-tx-8996
22 - qcom,hdmi-tx-8998
52 - hdmi-phy
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/exynos/ |
| H A D | exynos_hdmi.txt | 1 Device-Tree bindings for drm hdmi driver
5 1) "samsung,exynos4210-hdmi"
6 2) "samsung,exynos4212-hdmi"
7 3) "samsung,exynos5420-hdmi"
8 4) "samsung,exynos5433-hdmi"
9 - reg: physical base address of the hdmi and length of memory mapped
16 - ddc: phandle to the hdmi ddc node
17 - phy: phandle to the hdmi phy node
23 a) hdmi: Gate of HDMI IP bus clock.
24 b) sclk_hdmi: Gate of HDMI special clock.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | renesas,dw-hdmi.txt | 1 Renesas Gen3 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
15 - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
16 - "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX
17 - "renesas,r8a774e1-hdmi" for R8A774E1 (RZ/G2H) compatible HDMI TX
18 - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
19 - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
20 - "renesas,r8a77961-hdmi" for R8A77961 (R-Car M3-W+) compatible HDMI TX
21 - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX
[all …]
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| H A D | renesas,dw-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
7 title: Renesas R-Car DWC HDMI TX Encoder
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: synopsys,dw-hdmi.yaml#
23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX
24 - renesas,r8a774b1-hdmi # for RZ/G2N compatible HDMI TX
25 - renesas,r8a774e1-hdmi # for RZ/G2H compatible HDMI TX
26 - renesas,r8a7795-hdmi # for R-Car H3 compatible HDMI TX
27 - renesas,r8a7796-hdmi # for R-Car M3-W compatible HDMI TX
28 - renesas,r8a77961-hdmi # for R-Car M3-W+ compatible HDMI TX
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/samsung/ |
| H A D | samsung,exynos-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
7 title: Samsung Exynos SoC HDMI
18 - samsung,exynos4210-hdmi
19 - samsung,exynos4212-hdmi
20 - samsung,exynos5420-hdmi
21 - samsung,exynos5433-hdmi
34 Phandle to the HDMI DDC node.
36 hdmi-en-supply:
38 Provides voltage source for DCC lines available on HDMI connector. When
40 HPD (hot plug detect) line, what causes HDMI block to stay turned off.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | amlogic,meson-dw-hdmi.yaml | 5 $id: http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#
8 title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
18 - A Synopsys DesignWare HDMI Controller IP
20 - A custom HDMI PHY in order to convert video to TMDS signal
22 | HDMI TOP |<= HPD
25 | Synopsys HDMI | HDMI PHY |=> TMDS
29 The HDMI TOP block only supports HPD sensing.
30 The Synopsys HDMI Controller interrupt is routed through the
32 Communication to the TOP Block and the Synopsys HDMI Controller is done
34 The HDMI PHY is configured by registers in the HHI register block.
[all …]
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| H A D | allwinner,sun4i-a10-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
7 title: Allwinner A10 HDMI Controller
10 The HDMI Encoder supports the HDMI video and audio outputs, and does
20 - const: allwinner,sun4i-a10-hdmi
21 - const: allwinner,sun5i-a10s-hdmi
22 - const: allwinner,sun6i-a31-hdmi
24 - const: allwinner,sun7i-a20-hdmi
25 - const: allwinner,sun5i-a10s-hdmi
36 - description: The HDMI interface clock
37 - description: The HDMI module clock
[all …]
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| H A D | allwinner,sun8i-a83t-dw-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#
7 title: Allwinner A83t DWC HDMI TX Encoder
10 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller
14 These DT bindings follow the Synopsys DWC HDMI TX bindings defined
15 in bridge/synopsys,dw-hdmi.yaml with the following device-specific
28 - const: allwinner,sun8i-a83t-dw-hdmi
29 - const: allwinner,sun50i-h6-dw-hdmi
33 - allwinner,sun8i-h3-dw-hdmi
34 - allwinner,sun8i-r40-dw-hdmi
35 - allwinner,sun50i-a64-dw-hdmi
[all …]
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| H A D | brcm,bcm2711-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml#
7 title: Broadcom BCM2711 HDMI Controller
20 - description: HDMI controller register range
22 - description: HDMI PHY register range
32 - const: hdmi
44 - description: The HDMI state machine clock
46 - description: The HDMI Audio parent clock
47 - description: The HDMI CEC parent clock
51 - const: hdmi
82 The GPIO pin for the HDMI hotplug detect (if it doesn't appear
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/mediatek/ |
| H A D | mediatek,hdmi.txt | 1 Mediatek HDMI Encoder
4 The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
8 - compatible: Should be "mediatek,<chip>-hdmi".
15 - phys: phandle link to the HDMI PHY node.
17 - phy-names: must contain "hdmi"
18 - mediatek,syscon-hdmi: phandle link and register offset to the system
29 HDMI CEC
32 The HDMI CEC controller handles hotplug detection and CEC communication.
41 HDMI DDC
44 The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
[all …]
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| H A D | mediatek,hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi.yaml#
7 title: Mediatek HDMI Encoder
14 The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
20 - mediatek,mt2701-hdmi
21 - mediatek,mt7623-hdmi
22 - mediatek,mt8167-hdmi
23 - mediatek,mt8173-hdmi
34 - description: HDMI PLL
50 - const: hdmi
52 mediatek,syscon-hdmi:
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | am335x-boneblack.dts | 10 #include "am335x-boneblack-hdmi.dtsi"
50 "[hdmi cec]",
92 "[hdmi irq]",
94 "[hdmi audio]",
109 "P8_45 [hdmi]",
110 "P8_46 [hdmi]",
111 "P8_43 [hdmi]",
112 "P8_44 [hdmi]",
113 "P8_41 [hdmi]",
114 "P8_42 [hdmi]",
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
| H A D | nvidia,tegra20-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
7 title: NVIDIA Tegra HDMI Output Encoder
15 pattern: "^hdmi@[0-9a-f]+$"
20 - nvidia,tegra20-hdmi
21 - nvidia,tegra30-hdmi
22 - nvidia,tegra114-hdmi
23 - nvidia,tegra124-hdmi
26 - const: nvidia,tegra132-hdmi
27 - const: nvidia,tegra124-hdmi
42 - const: hdmi
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/rockchip/ |
| H A D | dw_hdmi-rockchip.txt | 1 Rockchip DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
15 "rockchip,rk3228-dw-hdmi"
16 "rockchip,rk3288-dw-hdmi"
17 "rockchip,rk3328-dw-hdmi"
18 "rockchip,rk3399-dw-hdmi"
21 - interrupts: HDMI interrupt number
24 - ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
31 - ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
[all …]
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| H A D | rockchip,dw-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
7 title: Rockchip DWC HDMI TX Encoder
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
23 - rockchip,rk3228-dw-hdmi
24 - rockchip,rk3288-dw-hdmi
25 - rockchip,rk3328-dw-hdmi
26 - rockchip,rk3399-dw-hdmi
27 - rockchip,rk3568-dw-hdmi
50 - description: The HDMI CEC controller main clock
[all …]
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| H A D | rockchip,inno-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,inno-hdmi.yaml#
7 title: Rockchip Innosilicon HDMI controller
16 - rockchip,rk3036-inno-hdmi
17 - rockchip,rk3128-inno-hdmi
28 - description: The HDMI controller main clock
29 - description: The HDMI PHY reference clock
55 Port node with one endpoint connected to a hdmi-connector node.
77 const: rockchip,rk3036-inno-hdmi
87 const: rockchip,rk3128-inno-hdmi
105 hdmi: hdmi@20034000 {
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/imx/ |
| H A D | hdmi.txt | 1 Freescale i.MX6 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
14 - compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
16 - interrupts: HDMI interrupt number
19 - ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
20 numbered 0 to 3, corresponding to the four inputs of the HDMI multiplexer.
22 - gpr : Shall contain a phandle to the iomuxc-gpr region containing the HDMI
27 - ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
28 or the functionally-reduced I2C master contained in the DWC HDMI. When
[all …]
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| H A D | fsl,imx6-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
7 title: Freescale i.MX6 DWC HDMI TX Encoder
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx6dl-hdmi
23 - fsl,imx6q-hdmi
37 phandle to the iomuxc-gpr region containing the HDMI multiplexer control
44 HDMI multiplexer. Each port shall have a single endpoint.
49 description: First input of the HDMI multiplexer
53 description: Second input of the HDMI multiplexer
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | imx-audio-hdmi.yaml | 4 $id: http://devicetree.org/schemas/sound/imx-audio-hdmi.yaml#
7 title: NXP i.MX audio complex with HDMI
15 - fsl,imx-audio-hdmi
26 hdmi-out:
30 of HDMI will be enabled, indicating there's a physical HDMI out
32 block, such as an HDMI encoder or display-controller.
34 hdmi-in:
38 HDMI will be enabled, indicating there is a physical HDMI in
50 sound-hdmi {
51 compatible = "fsl,imx-audio-hdmi";
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | amlogic,meson8-hdmi-tx-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/amlogic,meson8-hdmi-tx-phy.yaml#
7 title: Amlogic Meson8, Meson8b and Meson8m2 HDMI TX PHY
13 The HDMI TX PHY node should be the child of a syscon node with the
23 pattern: "^hdmi-phy@[0-9a-f]+$"
29 - amlogic,meson8b-hdmi-tx-phy
30 - amlogic,meson8m2-hdmi-tx-phy
31 - const: amlogic,meson8-hdmi-tx-phy
32 - const: amlogic,meson8-hdmi-tx-phy
40 HDMI TMDS clock
53 hdmi-phy@3a0 {
[all …]
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| H A D | mediatek,hdmi-phy.yaml | 5 $id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml#
8 title: MediaTek High Definition Multimedia Interface (HDMI) PHY
16 The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
17 output and drives the HDMI pads.
21 pattern: "^hdmi-phy@[0-9a-f]+$"
27 - mediatek,mt7623-hdmi-phy
28 - const: mediatek,mt2701-hdmi-phy
29 - const: mediatek,mt2701-hdmi-phy
30 - const: mediatek,mt8173-hdmi-phy
31 - const: mediatek,mt8195-hdmi-phy
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | adv7604.yaml | 7 title: Analog Devices ADV7604/10/11/12 video decoder with HDMI receiver
14 an integrated HDMI receiver. The ADV7604 has four multiplexed HDMI inputs
15 and one analog input, and the ADV7610/11 have one HDMI input and no analog
16 input. The ADV7612 is similar to the ADV7610/11 but has 2 HDMI inputs.
36 - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ]
37 - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ]
38 - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ]
39 - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ]
40 - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ]
41 - enum: [ avlink, cec, infoframe, esdp, dpp, afe, rep, edid, hdmi, test, cp, vdp ]
[all …]
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| /freebsd/sys/compat/linuxkpi/common/src/ |
| H A D | linux_hdmi.c | 31 #include <linux/hdmi.h>
57 * hdmi_avi_infoframe_init() - initialize an HDMI AVI infoframe
58 * @frame: HDMI AVI infoframe
84 * hdmi_avi_infoframe_check() - check a HDMI AVI infoframe
85 * @frame: HDMI AVI infoframe
99 * hdmi_avi_infoframe_pack_only() - write HDMI AVI infoframe to binary buffer
100 * @frame: HDMI AVI infoframe
107 * the HDMI 1.4 specification.
187 * hdmi_avi_infoframe_pack() - check a HDMI AVI infoframe,
189 * @frame: HDMI AVI infoframe
[all …]
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| /freebsd/sys/arm/nvidia/drm2/ |
| H A D | hdmi.c | 27 #include <arm/nvidia/drm2/hdmi.h>
55 * hdmi_avi_infoframe_init() - initialize an HDMI AVI infoframe
56 * @frame: HDMI AVI infoframe
73 * hdmi_avi_infoframe_pack() - write HDMI AVI infoframe to binary buffer
74 * @frame: HDMI AVI infoframe
81 * the HDMI 1.4 specification.
156 * hdmi_spd_infoframe_init() - initialize an HDMI SPD infoframe
157 * @frame: HDMI SPD infoframe
180 * hdmi_spd_infoframe_pack() - write HDMI SPD infoframe to binary buffer
181 * @frame: HDMI SPD infoframe
[all …]
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