Searched full:gears (Results 1 – 12 of 12) sorted by relevance
51 Per specification, SLIMbus uses "clock gears" to do power management based on52 current frequency and bandwidth requirements. There are 10 clock gears and each
99 * attribute IDs for High Speed (HS) Gears.101 * This table maps HS Gears to their respective UniPro PA_PeerRxHSGnAdaptInitial102 * attribute IDs. Entries for Gears 1-3 are 0 (unsupported).115 * attribute IDs for High Speed (HS) Gears.117 * This table maps HS Gears to their respective M-PHY118 * RX_HS_Gn_ADAPT_INITIAL_Capability attribute IDs. Entries for Gears 1-3 are 0132 * Speed (HS) Gears.134 * This table maps HS Gears to their respective UniPro PA_TxEQGnSetting1323 /* TX EQTR is supported for HS-G4 and higher Gears */ in ufshcd_config_tx_eq_settings()1378 * This function iterates through all supported High-Speed (HS) gears and
517 /* TX EQTR is supported for HS-G4 and higher Gears */ in ufs_debugfs_hba_init()
4821 * First, get the maximum gears of HS speed. in ufshcd_get_max_pwr_mode()4823 * Then, get the maximum gears of PWM speed. in ufshcd_get_max_pwr_mode()9403 * switch to HS gears. in ufshcd_post_device_init()
208 /* CPU gears */254 /* CPU gears */297 /* CPU gears */326 /* CPU gears */
412 * @clk_gears: Clock gears supported418 * @num_clk_gears: Number of clock gears supported
118 scales_prop = "mipi-sdw-supported-clock-gears"; in sdw_master_read_prop()
5 * Bandwidth management algorithm based on 2^n gears
1177 /* Additional sequence for different HS Gears */
1341 * backwards compatible with lower gears but not optimal from in ufs_qcom_set_phy_gear()
3248 * Change gears and see if in ahc_handle_message_phase()3402 * Change gears and see if in ahc_handle_message_phase()
4719 * Change gears and see if in ahd_handle_message_phase()4890 * Change gears and see if in ahd_handle_message_phase()