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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,pmic-gpio.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
7 title: Qualcomm PMIC GPIO block
13 This binding describes the GPIO block(s) found in the 8xxx series of
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
22 - qcom,pm660l-gpio
23 - qcom,pm6125-gpio
24 - qcom,pm6150-gpio
25 - qcom,pm6150l-gpio
26 - qcom,pm6350-gpio
[all …]
H A Dmarvell,kirkwood-pinctrl.txt24 mpp0 0 gpio, nand(io2), spi(cs)
28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
32 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
34 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
37 mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
40 mpp13 13 gpio, sdio(cmd), uart1(txd)
41 mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col)
42 mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd)
43 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
44 mpp17 17 gpio, sdio(d3)
[all …]
H A Dmarvell,armada-375-pinctrl.txt16 mpp0 0 gpio, dev(ad2), spi0(cs1), spi1(cs1)
17 mpp1 1 gpio, dev(ad3), spi0(mosi), spi1(mosi)
18 mpp2 2 gpio, dev(ad4), ptp(evreq), led(c0), audio(sdi)
19 mpp3 3 gpio, dev(ad5), ptp(trig), led(p3), audio(mclk)
20 mpp4 4 gpio, dev(ad6), spi0(miso), spi1(miso)
21 mpp5 5 gpio, dev(ad7), spi0(cs2), spi1(cs2)
22 mpp6 6 gpio, dev(ad0), led(p1), audio(lrclk)
23 mpp7 7 gpio, dev(ad1), ptp(clk), led(p2), audio(extclk)
24 mpp8 8 gpio, dev (bootcs), spi0(cs0), spi1(cs0)
25 mpp9 9 gpio, spi0(sck), spi1(sck), nand(we)
[all …]
H A Dmarvell,armada-xp-pinctrl.txt21 mpp0 0 gpio, ge0(txclkout), lcd(d0)
22 mpp1 1 gpio, ge0(txd0), lcd(d1)
23 mpp2 2 gpio, ge0(txd1), lcd(d2)
24 mpp3 3 gpio, ge0(txd2), lcd(d3)
25 mpp4 4 gpio, ge0(txd3), lcd(d4)
26 mpp5 5 gpio, ge0(txctl), lcd(d5)
27 mpp6 6 gpio, ge0(rxd0), lcd(d6)
28 mpp7 7 gpio, ge0(rxd1), lcd(d7)
29 mpp8 8 gpio, ge0(rxd2), lcd(d8)
30 mpp9 9 gpio, ge0(rxd3), lcd(d9)
[all …]
H A Dmarvell,armada-37xx-pinctrl.txt1 * Marvell Armada 37xx SoC pin and gpio controller
3 Each Armada 37xx SoC come with two pin and gpio controller one for the
6 Inside this set of register the gpio latch allows exposing some
11 GPIO and pin controller:
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
34 - functions jtag, gpio
38 - functions sdio, gpio
42 - functions emmc, gpio
46 - functions pwm, led, gpio
[all …]
H A Dmarvell,orion-pinctrl.txt24 mpp0 0 pcie(rstout), pci(req2), gpio
25 mpp1 1 gpio, pci(gnt2)
26 mpp2 2 gpio, pci(req3), pci-1(pme)
27 mpp3 3 gpio, pci(gnt3)
28 mpp4 4 gpio, pci(req4)
29 mpp5 5 gpio, pci(gnt4)
30 mpp6 6 gpio, pci(req5), pci-1(clk)
31 mpp7 7 gpio, pci(gnt5), pci-1(clk)
32 mpp8 8 gpio, ge(col)
33 mpp9 9 gpio, ge(rxerr)
[all …]
H A Dmarvell,armada-38x-pinctrl.txt18 mpp0 0 gpio, ua0(rxd)
19 mpp1 1 gpio, ua0(txd)
20 mpp2 2 gpio, i2c0(sck)
21 mpp3 3 gpio, i2c0(sda)
22 mpp4 4 gpio, ge(mdc), ua1(txd), ua0(rts)
23 mpp5 5 gpio, ge(mdio), ua1(rxd), ua0(cts)
24 mpp6 6 gpio, ge0(txclkout), ge0(crs), dev(cs3)
25 mpp7 7 gpio, ge0(txd0), dev(ad9)
26 mpp8 8 gpio, ge0(txd1), dev(ad10)
27 mpp9 9 gpio, ge0(txd2), dev(ad11)
[all …]
H A Dmarvell,armada-39x-pinctrl.txt18 mpp0 0 gpio, ua0(rxd)
19 mpp1 1 gpio, ua0(txd)
20 mpp2 2 gpio, i2c0(sck)
21 mpp3 3 gpio, i2c0(sda)
22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
23 mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
24 mpp6 6 gpio, dev(cs3), xsmi(mdio)
25 mpp7 7 gpio, dev(ad9), xsmi(mdc)
26 mpp8 8 gpio, dev(ad10), ptp(trig)
27 mpp9 9 gpio, dev(ad11), ptp(clk)
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos9810-pinctrl.dtsi12 etc1: etc1-gpio-bank {
13 gpio-controller;
14 #gpio-cells = <2>;
20 gpa0: gpa0-gpio-bank {
21 gpio-controller;
22 #gpio-cells = <2>;
37 gpa1: gpa1-gpio-bank {
38 gpio-controller;
39 #gpio-cells = <2>;
54 gpa2: gpa2-gpio-bank {
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5410-pinctrl.dtsi12 gpa0: gpa0-gpio-bank {
13 gpio-controller;
14 #gpio-cells = <2>;
20 gpa1: gpa1-gpio-bank {
21 gpio-controller;
22 #gpio-cells = <2>;
28 gpa2: gpa2-gpio-bank {
29 gpio-controller;
30 #gpio-cells = <2>;
36 gpb0: gpb0-gpio-bank {
[all …]
/freebsd/sys/contrib/device-tree/src/arc/
H A Dabilis_tb100.dtsi37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
50 pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */
63 pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */
76 pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */
83 pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */
86 pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */
118 pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */
121 pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */
132 pctl_gpio_n: pctl-gpio-n {
136 pctl_gpio_b: pctl-gpio-b {
[all …]
H A Dabilis_tb101.dtsi37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
50 pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */
63 pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */
76 pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */
83 pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */
86 pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */
124 pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */
127 pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */
141 pctl_gpio_n: pctl-gpio-n {
145 pctl_gpio_b: pctl-gpio-b {
[all …]
/freebsd/sys/dev/sdhci/
H A Dsdhci_fdt_gpio.c27 * Support routines usable by any SoC sdhci bridge driver that uses gpio pins
33 #include <sys/gpio.h>
38 #include <dev/gpio/gpiobusvar.h>
65 struct sdhci_fdt_gpio *gpio = arg; in cd_intr() local
67 sdhci_handle_card_present(gpio->slot, sdhci_fdt_gpio_get_present(gpio)); in cd_intr()
74 cd_setup(struct sdhci_fdt_gpio *gpio, phandle_t node) in cd_setup() argument
80 dev = gpio->dev; in cd_setup()
87 gpio->slot->opt |= SDHCI_NON_REMOVABLE; in cd_setup()
88 gpio->cd_disabled = true; in cd_setup()
102 if (gpio_pin_get_by_ofw_property(dev, node, "cd-gpios", &gpio->cd_pin)) in cd_setup()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dfsl-imx-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/fsl-imx-gpio.yaml#
7 title: Freescale i.MX/MXC GPIO controller
18 - fsl,imx1-gpio
19 - fsl,imx21-gpio
20 - fsl,imx31-gpio
21 - fsl,imx35-gpio
22 - fsl,imx7d-gpio
25 - fsl,imx27-gpio
26 - const: fsl,imx21-gpio
28 - const: fsl,imx35-gpio
[all …]
H A Dnvidia,tegra186-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml#
7 title: NVIDIA Tegra GPIO Controller (Tegra186 and later)
14 Tegra186 contains two GPIO controllers; a main controller and an "AON"
20 The Tegra186 GPIO controller allows software to set the IO direction of,
21 and read/write the value of, numerous GPIO signals. Routing of GPIO signals
26 GPIO register set. These registers exist in a single contiguous block
28 features available, varies between the different GPIO controllers.
31 Code that wishes to configure access to the GPIO registers needs access
33 GPIO data does not need access to these registers.
35 b) GPIO registers, which allow manipulation of the GPIO signals. In some
[all …]
H A Drenesas,rcar-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/renesas,rcar-gpio.yaml#
7 title: Renesas R-Car General-Purpose Input/Output Ports (GPIO)
17 - renesas,gpio-r8a7778 # R-Car M1
18 - renesas,gpio-r8a7779 # R-Car H1
19 - const: renesas,rcar-gen1-gpio # R-Car Gen1
23 - renesas,gpio-r8a7742 # RZ/G1H
24 - renesas,gpio-r8a7743 # RZ/G1M
25 - renesas,gpio-r8a7744 # RZ/G1N
26 - renesas,gpio-r8a7745 # RZ/G1E
27 - renesas,gpio-r8a77470 # RZ/G1C
[all …]
H A Dgpio.txt1 Specifying GPIO information for devices
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
23 The following example could be used to describe GPIO pins used as device enable
27 gpio-controller;
28 #gpio-cells = <2>;
37 In the above example, &gpio1 uses 2 cells to specify a gpio. The first cell is
38 a local offset to the GPIO line and the second cell represents consumer flags,
[all …]
H A Dgpio-ep9301.yaml4 $id: http://devicetree.org/schemas/gpio/gpio-ep9301.yaml#
7 title: EP93xx GPIO controller
17 - const: cirrus,ep9301-gpio
20 - cirrus,ep9302-gpio
21 - cirrus,ep9307-gpio
22 - cirrus,ep9312-gpio
23 - cirrus,ep9315-gpio
24 - const: cirrus,ep9301-gpio
40 gpio-controller: true
42 gpio-ranges: true
[all …]
H A Dtrivial-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/trivial-gpio.yaml#
7 title: Trivial 2-cell GPIO controllers
17 - cirrus,ep7312-gpio
18 - const: cirrus,ep7209-gpio
20 - apm,xgene-gpio
21 - cirrus,ep7209-gpio
22 - cznic,moxtet-gpio
25 - fsl,ls1046aqds-fpga-gpio-stat-pres2
26 - fsl,lx2160ardb-fpga-gpio-sfp
27 - gateworks,pld-gpio
[all …]
H A Dfsl,qoriq-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/fsl,qoriq-gpio.yaml#
7 title: Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
16 - fsl,mpc5121-gpio
17 - fsl,mpc5125-gpio
18 - fsl,mpc8314-gpio
19 - fsl,mpc8349-gpio
20 - fsl,mpc8572-gpio
21 - fsl,mpc8610-gpio
22 - fsl,pq3-gpio
25 - fsl,ls1021a-gpio
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/axis/
H A Dartpec8-pinctrl.dtsi14 gpe0: gpe0-gpio-bank {
15 gpio-controller;
16 #gpio-cells = <2>;
21 gpe1: gpe1-gpio-bank {
22 gpio-controller;
23 #gpio-cells = <2>;
28 gpe2: gpe2-gpio-bank {
29 gpio-controller;
30 #gpio-cells = <2>;
35 gpf0: gpf0-gpio-bank {
[all …]
/freebsd/sys/dts/
H A Dbindings-gpio.txt2 GPIO configuration.
5 1. Properties for GPIO Controllers
7 1.1 #gpio-cells
9 Property: #gpio-cells
13 Description: The #gpio-cells property defines the number of cells required
14 to encode a gpio specifier.
17 1.2 gpio-controller
19 Property: gpio-controller
23 Description: The presence of a gpio-controller property defines a node as a
24 GPIO controller node.
[all …]
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-facebook-yosemite4.dts6 #include <dt-bindings/gpio/aspeed-gpio.h>
74 compatible = "spi-gpio";
194 gpio@21 {
197 gpio-controller;
198 #gpio-cells = <2>;
201 gpio@22 {
204 gpio-controller;
205 #gpio-cells = <2>;
206 gpio-line-names = "SLOT1_UART_SEL0","SLOT1_UART_SEL1",
213 gpio@23 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am65-iot2050-arduino-connector.dtsi15 "d0-uart0-rxd", "d0-gpio", "d0-gpio-pullup", "d0-gpio-pulldown",
16 "d1-uart0-txd", "d1-gpio", "d1-gpio-pullup", "d1-gpio-pulldown",
17 "d2-uart0-ctsn", "d2-gpio", "d2-gpio-pullup", "d2-gpio-pulldown",
18 "d3-uart0-rtsn", "d3-gpio", "d3-gpio-pullup", "d3-gpio-pulldown",
19 "d10-spi0-cs0", "d10-gpio", "d10-gpio-pullup", "d10-gpio-pulldown",
20 "d11-spi0-d0", "d11-gpio", "d11-gpio-pullup", "d11-gpio-pulldown",
21 "d12-spi0-d1", "d12-gpio", "d12-gpio-pullup", "d12-gpio-pulldown",
22 "d13-spi0-clk", "d13-gpio", "d13-gpio-pullup", "d13-gpio-pulldown",
23 "a0-gpio", "a0-gpio-pullup", "a0-gpio-pulldown",
24 "a1-gpio", "a1-gpio-pullup", "a1-gpio-pulldown",
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Damlogic-s6.dtsi8 #include <dt-bindings/gpio/gpio.h>
113 gpioz: gpio@c0 {
115 reg-names = "gpio", "mux";
116 gpio-controller;
117 #gpio-cells = <2>;
118 gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 16>;
121 gpiox: gpio@100 {
123 reg-names = "gpio", "mux";
124 gpio-controller;
125 #gpio-cells = <2>;
[all …]

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