12e36db14SWarner Losh 22e36db14SWarner LoshGPIO configuration. 32e36db14SWarner Losh=================== 42e36db14SWarner Losh 52e36db14SWarner Losh1. Properties for GPIO Controllers 62e36db14SWarner Losh 72e36db14SWarner Losh1.1 #gpio-cells 82e36db14SWarner Losh 92e36db14SWarner LoshProperty: #gpio-cells 102e36db14SWarner Losh 112e36db14SWarner LoshValue type: <u32> 122e36db14SWarner Losh 132e36db14SWarner LoshDescription: The #gpio-cells property defines the number of cells required 142e36db14SWarner Losh to encode a gpio specifier. 152e36db14SWarner Losh 162e36db14SWarner Losh 172e36db14SWarner Losh1.2 gpio-controller 182e36db14SWarner Losh 192e36db14SWarner LoshProperty: gpio-controller 202e36db14SWarner Losh 212e36db14SWarner LoshValue type: <empty> 222e36db14SWarner Losh 232e36db14SWarner LoshDescription: The presence of a gpio-controller property defines a node as a 242e36db14SWarner Losh GPIO controller node. 252e36db14SWarner Losh 262e36db14SWarner Losh 272e36db14SWarner Losh1.3 pin-count 282e36db14SWarner Losh 292e36db14SWarner LoshProperty: pin-count 302e36db14SWarner Losh 312e36db14SWarner LoshValue type: <u32> 322e36db14SWarner Losh 332e36db14SWarner LoshDescription: The pin-count property defines the number of GPIO pins. 342e36db14SWarner Losh 352e36db14SWarner Losh 362e36db14SWarner Losh1.4 Example 372e36db14SWarner Losh 382e36db14SWarner Losh GPIO: gpio@10100 { 392e36db14SWarner Losh #gpio-cells = <3>; 402e36db14SWarner Losh compatible = "mrvl,gpio"; 412e36db14SWarner Losh reg = <0x10100 0x20>; 422e36db14SWarner Losh gpio-controller; 432e36db14SWarner Losh interrupts = <6 7 8 9>; 442e36db14SWarner Losh interrupt-parent = <&PIC>; 452e36db14SWarner Losh pin-count = <50> 462e36db14SWarner Losh }; 472e36db14SWarner Losh 482e36db14SWarner Losh2. Properties for GPIO consumer nodes. 492e36db14SWarner Losh 502e36db14SWarner Losh2.1 gpios 512e36db14SWarner Losh 522e36db14SWarner LoshProperty: gpios 532e36db14SWarner Losh 542e36db14SWarner LoshValue type: <prop-encoded-array> encoded as arbitrary number of GPIO 552e36db14SWarner Losh specifiers. 562e36db14SWarner Losh 572e36db14SWarner LoshDescription: The gpios property of a device node defines the GPIO or GPIOs 582e36db14SWarner Losh that are used by the device. The value of the gpios property 592e36db14SWarner Losh consists of an arbitrary number of GPIO specifiers. 602e36db14SWarner Losh 612e36db14SWarner Losh The first cell of the GPIO specifier is phandle of the node's 622e36db14SWarner Losh parent GPIO controller and remaining cells are defined by the 632e36db14SWarner Losh binding describing the GPIO parent, typically include 642e36db14SWarner Losh information like pin number, direction and various flags. 652e36db14SWarner Losh 662e36db14SWarner LoshExample: 67*ded9da68SMarcin Wojtas gpios = <&GPIO 0 1 /* GPIO[0]: FLAGS */ 68*ded9da68SMarcin Wojtas &GPIO 1 2>; /* GPIO[1]: FLAGS */ 692e36db14SWarner Losh 702e36db14SWarner Losh 71*ded9da68SMarcin Wojtas3. GPIO controller specifier 722e36db14SWarner Losh 732e36db14SWarner Losh <phandle pin dir flags> 742e36db14SWarner Losh 752e36db14SWarner Losh 762e36db14SWarner Loshpin: 0-MAX GPIO pin number. 772e36db14SWarner Losh 782e36db14SWarner Loshflags: 79*ded9da68SMarcin Wojtas Available flags are listed in sys/conf.h. Following combination 80*ded9da68SMarcin Wojtas can be supported by the controller. For details please refer 81*ded9da68SMarcin Wojtas to controller's GPIO reference manual. 822e36db14SWarner Losh 83*ded9da68SMarcin Wojtas GPIO_PIN_INPUT 0x0001 Input direction 84*ded9da68SMarcin Wojtas GPIO_PIN_OUTPUT 0x0002 Output direction 85*ded9da68SMarcin Wojtas GPIO_PIN_OPENDRAIN 0x0004 Open-drain output 86*ded9da68SMarcin Wojtas GPIO_PIN_OPENSOURCE 0x0008 Open-source output 87*ded9da68SMarcin Wojtas GPIO_PIN_PUSHPULL 0x0010 Push-pull output 88*ded9da68SMarcin Wojtas GPIO_PIN_TRISTATE 0x0020 Output disabled 89*ded9da68SMarcin Wojtas GPIO_PIN_PULLUP 0x0040 Internal pull-up enabled 90*ded9da68SMarcin Wojtas GPIO_PIN_PULLDOWN 0x0080 Internal pull-down enabled 91*ded9da68SMarcin Wojtas GPIO_PIN_INVIN 0x0100 Invert input 92*ded9da68SMarcin Wojtas GPIO_PIN_INVOUT 0x0200 Invert output 93*ded9da68SMarcin Wojtas GPIO_PIN_PULSATE 0x0400 Pulsate in hardware 94*ded9da68SMarcin Wojtas GPIO_PIN_IRQ_POL_EDG 0x0800 IRQ active single edge 95*ded9da68SMarcin Wojtas GPIO_PIN_IRQ_POL_DBL 0x1000 IRQ active double edge 96*ded9da68SMarcin Wojtas GPIO_PIN_IRQ_POL_LVL 0x2000 IRQ active level 97*ded9da68SMarcin Wojtas GPIO_PIN_IRQ_DEBOUNCE 0x4000 Debounce on IRQ pin 982e36db14SWarner Losh 992e36db14SWarner LoshExample: 100*ded9da68SMarcin Wojtas gpios = <&GPIO 0 0x00000001 /* GPIO[0]: IN */ 101*ded9da68SMarcin Wojtas &GPIO 1 0x00000002 /* GPIO[1]: OUT */ 102*ded9da68SMarcin Wojtas &GPIO 2 0x00000801 /* GPIO[2]: IN, IRQ (edge) */ 103*ded9da68SMarcin Wojtas &GPIO 3 0x00004001 /* GPIO[3]: IN, IRQ (level) */ 1042e36db14SWarner Losh ... 105*ded9da68SMarcin Wojtas &GPIO 10 0x00000401>; /* GPIO[10]: OUT, blink */ 106