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/linux/Documentation/devicetree/bindings/net/dsa/
H A Dlantiq,gswip.yaml43 gphy-fw:
55 - lantiq,xrx200-gphy-fw
56 - lantiq,xrx300-gphy-fw
57 - lantiq,xrx330-gphy-fw
58 - const: lantiq,gphy-fw
65 "^gphy@[0-9a-f]{1,2}$":
75 Offset of the GPHY firmware register in the RCU register range
79 - description: GPHY reset line
83 - const: gphy
182 gphy-fw {
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H A Dbrcm,sf2.yaml61 brcm,num-gphy:
153 brcm,num-gphy = <1>;
163 label = "gphy";
/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_g.c73 /* APHY.rev < 5 || GPHY.rev < 6 */ in generate_rfatt_list()
208 struct b43_phy_g *gphy = phy->g; in b43_set_txpower_g() local
209 struct b43_txpower_lo_control *lo = gphy->lo_control; in b43_set_txpower_g()
221 * to pass &gphy->rfatt as rfatt pointer argument. Same for bbatt. */ in b43_set_txpower_g()
222 gphy->tx_control = tx_control; in b43_set_txpower_g()
223 memmove(&gphy->rfatt, rfatt, sizeof(*rfatt)); in b43_set_txpower_g()
224 gphy->rfatt.with_padmix = !!(tx_control & B43_TXCTL_TXMIX); in b43_set_txpower_g()
225 memmove(&gphy->bbatt, bbatt, sizeof(*bbatt)); in b43_set_txpower_g()
254 struct b43_phy_g *gphy = dev->phy.g; in b43_gphy_tssi_power_lt_init() local
259 b43_ofdmtab_write16(dev, 0x3C20, i, gphy->tssi2dbm[i]); in b43_gphy_tssi_power_lt_init()
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H A Dlo.c165 struct b43_phy_g *gphy = phy->g; in lo_measure_txctl_values() local
166 struct b43_txpower_lo_control *lo = gphy->lo_control; in lo_measure_txctl_values()
187 lb_gain = gphy->max_lb_gain / 2; in lo_measure_txctl_values()
262 struct b43_phy_g *gphy = phy->g; in lo_read_power_vector() local
263 struct b43_txpower_lo_control *lo = gphy->lo_control; in lo_read_power_vector()
279 /* 802.11/LO/GPHY/MeasuringGains */
284 struct b43_phy_g *gphy = phy->g; in lo_measure_gain_values() local
294 trsw_rx_gain = gphy->trsw_rx_gain / 2; in lo_measure_gain_values()
301 gphy->lna_lod_gain = 0; in lo_measure_gain_values()
303 gphy->lna_lod_gain = 1; in lo_measure_gain_values()
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H A Dtables.c368 struct b43_phy_g *gphy = dev->phy.g; in b43_ofdmtab_read16() local
372 if ((gphy->ofdmtab_addr_direction != B43_OFDMTAB_DIRECTION_READ) || in b43_ofdmtab_read16()
373 (addr - 1 != gphy->ofdmtab_addr)) { in b43_ofdmtab_read16()
376 gphy->ofdmtab_addr_direction = B43_OFDMTAB_DIRECTION_READ; in b43_ofdmtab_read16()
378 gphy->ofdmtab_addr = addr; in b43_ofdmtab_read16()
389 struct b43_phy_g *gphy = dev->phy.g; in b43_ofdmtab_write16() local
393 if ((gphy->ofdmtab_addr_direction != B43_OFDMTAB_DIRECTION_WRITE) || in b43_ofdmtab_write16()
394 (addr - 1 != gphy->ofdmtab_addr)) { in b43_ofdmtab_write16()
397 gphy->ofdmtab_addr_direction = B43_OFDMTAB_DIRECTION_WRITE; in b43_ofdmtab_write16()
399 gphy->ofdmtab_addr = addr; in b43_ofdmtab_write16()
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H A Dxmit.c575 struct b43_phy_g *gphy = phy->g; in b43_rssi_postprocess() local
596 tmp = gphy->nrssi_lt[in_rssi]; in b43_rssi_postprocess()
/linux/drivers/phy/broadcom/
H A Dphy-bcm-kona-usb2.c50 static int bcm_kona_usb_phy_init(struct phy *gphy) in bcm_kona_usb_phy_init() argument
52 struct bcm_kona_usb *phy = phy_get_drvdata(gphy); in bcm_kona_usb_phy_init()
68 static int bcm_kona_usb_phy_power_on(struct phy *gphy) in bcm_kona_usb_phy_power_on() argument
70 struct bcm_kona_usb *phy = phy_get_drvdata(gphy); in bcm_kona_usb_phy_power_on()
77 static int bcm_kona_usb_phy_power_off(struct phy *gphy) in bcm_kona_usb_phy_power_off() argument
79 struct bcm_kona_usb *phy = phy_get_drvdata(gphy); in bcm_kona_usb_phy_power_off()
97 struct phy *gphy; in bcm_kona_usb2_probe() local
110 gphy = devm_phy_create(dev, NULL, &ops); in bcm_kona_usb2_probe()
111 if (IS_ERR(gphy)) in bcm_kona_usb2_probe()
112 return PTR_ERR(gphy); in bcm_kona_usb2_probe()
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/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dcphy.h148 struct gphy { struct
160 extern const struct gphy t1_my3126_ops; argument
161 extern const struct gphy t1_mv88e1xxx_ops;
162 extern const struct gphy t1_vsc8244_ops;
163 extern const struct gphy t1_mv88x201x_ops;
H A Dsubr.c412 .gphy = &t1_my3126_ops,
432 .gphy = &t1_mv88x201x_ops,
452 .gphy = &t1_mv88x201x_ops,
474 .gphy = &t1_mv88x201x_ops,
496 .gphy = &t1_my3126_ops,
520 .gphy = &t1_mv88e1xxx_ops,
1098 if (bi->gphy->reset) in t1_init_sw_modules()
1099 bi->gphy->reset(adapter); in t1_init_sw_modules()
1108 adapter->port[i].phy = bi->gphy->create(adapter->port[i].dev, in t1_init_sw_modules()
H A Dcommon.h261 struct gphy;
280 const struct gphy *gphy; member
H A Dmy3126.c207 const struct gphy t1_my3126_ops = {
H A Dmv88x201x.c247 const struct gphy t1_mv88x201x_ops = {
H A Dmv88e1xxx.c395 const struct gphy t1_mv88e1xxx_ops = {
/linux/Documentation/devicetree/bindings/net/
H A Dbrcm,bcm7445-switch-v4.0.txt31 brcm,num-gphy = <1>;
43 label = "gphy";
/linux/drivers/pinctrl/
H A Dpinctrl-xway.c633 MFP_XWAY(GPIO2, GPIO, CGU, EXIN, GPHY),
636 MFP_XWAY(GPIO5, GPIO, STP, GPHY, DFE),
638 MFP_XWAY(GPIO7, GPIO, CGU, CBUS, GPHY),
675 MFP_XWAY(GPIO44, GPIO, MII, SIN, GPHY),
676 MFP_XWAY(GPIO45, GPIO, MII, GPHY, SIN),
678 MFP_XWAY(GPIO47, GPIO, MII, GPHY, SIN),
824 GRP_MUX("gphy0 led0", GPHY, xrx200_pins_gphy0_led0),
825 GRP_MUX("gphy0 led1", GPHY, xrx200_pins_gphy0_led1),
826 GRP_MUX("gphy0 led2", GPHY, xrx200_pins_gphy0_led2),
827 GRP_MUX("gphy1 led0", GPHY, xrx200_pins_gphy1_led0),
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/linux/drivers/net/ethernet/marvell/
H A Dsky2.h41 PCI_PHY_LNK_TIM_MSK= 3L<<8,/* Bit 9.. 8: GPHY Link Trigger Timer */
43 PCI_ENA_GPHY_LNK = 1<<6, /* Enable PEX L1 on GPHY Link down */
101 P_ASPM_GPHY_LINK_DOWN = 1<<14, /* GPHY Link Down (A1 only) */
123 P_REL_GPHY_REC_PACKET = 1<<25, /* GPHY Received Packet */
132 P_REL_GPHY_LINK_UP = 1<<16, /* GPHY Link Up */
136 P_GAT_GPHY_N_REC_PACKET = 1<<9, /* GPHY Not Received Packet */
145 P_GAT_GPHY_LINK_DOWN = 1<<0, /* GPHY Link Down */
204 PSM_CONFIG_REG1_EN_GPHY_INT_PSM = 1<<20, /* Enable GPHY INT for PSM */
210 PSM_CONFIG_REG1_GPHY_ENERGY_STS = 1<<31, /* GPHY Energy Detect Status */
225 PSM_CONFIG_REG1_GPHY_INT = 1<<16, /* GPHY INT Status */
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H A Dskge.h528 /* GPHY address (bits 15..11 of SMI control reg) */
848 /* GMAC and GPHY Control Registers (YUKON only) */
851 GPHY_CTRL = 0x0f04,/* 32 bit GPHY Control Reg */
1653 GM_PHY_ADDR = 0x0088, /* 16 bit r/w GPHY Address Register */
1814 /* GM_PHY_ADDR 16 bit r/w GPHY Address Register */
1902 /* GPHY_CTRL 32 bit GPHY Control Reg (YUKON only) */
1926 GPC_RST_CLR = 1<<1, /* Clear GPHY Reset */
1927 GPC_RST_SET = 1<<0, /* Set GPHY Reset */
/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-stp-xway.yaml68 The gphy core can control 3 bits of the gpio cascade. In the xRX200 family
/linux/Documentation/devicetree/bindings/leds/
H A Dleds-lgm.yaml123 function = "gphy";
/linux/drivers/net/dsa/
H A Dbcm_sf2.c311 /* Re-enable the GPHY and re-apply workarounds */ in bcm_sf2_port_setup()
1530 /* Assume a single GPHY setup if we can't read that property */ in bcm_sf2_sw_probe()
1531 if (of_property_read_u32(dn, "brcm,num-gphy", in bcm_sf2_sw_probe()
1590 /* For a kernel about to be kexec'd we want to keep the GPHY on for a in bcm_sf2_sw_shutdown()
1591 * successful MDIO bus scan to occur. If we did turn off the GPHY in bcm_sf2_sw_shutdown()
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dlantiq,pinctrl-xway.txt89 spi, usif, cgu, exin, stp, gpt, nmi, pci, ebu, mdio, dfe, gphy
/linux/drivers/net/phy/
H A Dbcm-cygnus.c266 .name = "Broadcom Omega Combo GPHY",
/linux/drivers/net/ethernet/intel/igc/
H A Digc_phy.c765 * igc_read_phy_fw_version - Read gPHY firmware version
777 hw_dbg("igc_phy: read wrong gphy version\n"); in igc_read_phy_fw_version()
/linux/Documentation/networking/device_drivers/ethernet/altera/
H A Daltera_tse.rst112 The driver is compatible with PAL to work with PHY and GPHY devices.
/linux/arch/arm64/boot/dts/broadcom/bcmbca/
H A Dbcm4908.dtsi227 brcm,num-gphy = <5>;

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