Lines Matching full:gphy
41 PCI_PHY_LNK_TIM_MSK= 3L<<8,/* Bit 9.. 8: GPHY Link Trigger Timer */
43 PCI_ENA_GPHY_LNK = 1<<6, /* Enable PEX L1 on GPHY Link down */
101 P_ASPM_GPHY_LINK_DOWN = 1<<14, /* GPHY Link Down (A1 only) */
123 P_REL_GPHY_REC_PACKET = 1<<25, /* GPHY Received Packet */
132 P_REL_GPHY_LINK_UP = 1<<16, /* GPHY Link Up */
136 P_GAT_GPHY_N_REC_PACKET = 1<<9, /* GPHY Not Received Packet */
145 P_GAT_GPHY_LINK_DOWN = 1<<0, /* GPHY Link Down */
204 PSM_CONFIG_REG1_EN_GPHY_INT_PSM = 1<<20, /* Enable GPHY INT for PSM */
210 PSM_CONFIG_REG1_GPHY_ENERGY_STS = 1<<31, /* GPHY Energy Detect Status */
225 PSM_CONFIG_REG1_GPHY_INT = 1<<16, /* GPHY INT Status */
251 PSM_CONFIG_REG4_RST_PHY_LINK_DETECT = 1<<0, /* Reset GPHY Link Detect */
1098 /* GMAC and GPHY Control Registers (YUKON only) */
1101 GPHY_CTRL = 0x0f04,/* 32 bit GPHY Control Reg */
1666 GM_PHY_ADDR = 0x0088, /* 16 bit r/w GPHY Address Register */
1832 /* GM_PHY_ADDR 16 bit r/w GPHY Address Register */
2034 /* GPHY_CTRL 32 bit GPHY Control Reg (YUKON only) */
2056 GPC_LEDCTL = 3<<6, /* GPHY Leds */
2058 GPC_RST_CLR = 1<<1, /* Clear GPHY Reset */
2059 GPC_RST_SET = 1<<0, /* Set GPHY Reset */