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Searched full:gmu (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gmu.c21 static void a6xx_gmu_fault(struct a6xx_gmu *gmu) in a6xx_gmu_fault() argument
23 struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); in a6xx_gmu_fault()
28 gmu->hung = true; in a6xx_gmu_fault()
39 struct a6xx_gmu *gmu = data; in a6xx_gmu_irq() local
42 status = gmu_read(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_STATUS); in a6xx_gmu_irq()
43 gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_CLR, status); in a6xx_gmu_irq()
46 dev_err_ratelimited(gmu->dev, "GMU watchdog expired\n"); in a6xx_gmu_irq()
48 a6xx_gmu_fault(gmu); in a6xx_gmu_irq()
52 dev_err_ratelimited(gmu->dev, "GMU AHB bus error\n"); in a6xx_gmu_irq()
55 dev_err_ratelimited(gmu->dev, "GMU fence error: 0x%x\n", in a6xx_gmu_irq()
[all …]
H A Da6xx_gpu_state.c155 if (!a6xx_gmu_sptprac_is_on(&a6xx_gpu->gmu)) in a6xx_crashdumper_run()
1189 /* Read a block of GMU registers */
1198 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in _a6xx_get_gmu_registers() local
1218 val = gmu_read_rscc(gmu, offset); in _a6xx_get_gmu_registers()
1220 val = gmu_read(gmu, offset); in _a6xx_get_gmu_registers()
1241 /* Get the CX GMU registers from AHB */ in a6xx_get_gmu_registers()
1254 if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) in a6xx_get_gmu_registers()
1292 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_snapshot_gmu_hfi_history() local
1295 BUILD_BUG_ON(ARRAY_SIZE(gmu->queues) != ARRAY_SIZE(a6xx_state->hfi_queue_history)); in a6xx_snapshot_gmu_hfi_history()
1297 for (i = 0; i < ARRAY_SIZE(gmu->queues); i++) { in a6xx_snapshot_gmu_hfi_history()
[all …]
H A Da6xx_gpu_state.h345 /* GMU GX */
354 /* GMU CX */
364 /* GMU AO */
H A Dadreno_gpu.c602 /* Skip loading GMU firmware with GMU Wrapper */ in adreno_load_fw()
1190 /* Only handle the core clock when GMU is not in use (or is absent). */ in adreno_gpu_init()
/linux/arch/arm64/boot/dts/qcom/
H A Dsdm670.dtsi1360 * controlled entirely by the GMU
1369 qcom,gmu = <&gmu>;
1476 gmu: gmu@506a000 { label
1477 compatible = "qcom,adreno-gmu-615.0", "qcom,adreno-gmu";
1482 reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
1486 interrupt-names = "hfi", "gmu";
1492 clock-names = "gmu", "cxo", "axi", "memnoc";
H A Dsm6115.dtsi1721 /* There's no (real) GMU, so we have to handle quite a bunch of clocks! */
1732 "gmu",
1740 qcom,gmu = <&gmu_wrapper>;
1806 gmu_wrapper: gmu@596a000 {
1807 compatible = "qcom,adreno-gmu-wrapper";
1809 reg-names = "gmu";
H A Dsm8150-mtp.dts353 &gmu {
H A Dsm8250-xiaomi-elish-common.dtsi539 &gmu {
/linux/Documentation/devicetree/bindings/sram/
H A Dqcom,ocmem.yaml120 gmu-sram@0 {
/linux/Documentation/devicetree/bindings/iommu/
H A Darm,smmu.yaml514 - const: gmu
523 - description: GMU clock
/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-qcom.c38 { .compatible = "qcom,adreno-gmu",
369 { .compatible = "qcom,adreno-gmu" },
/linux/drivers/gpu/drm/msm/
H A Dmsm_gem.h44 * A VM object representing a GPU (or display or GMU or ...) virtual address
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8226.dtsi1359 gmu_sram: gmu-sram@0 {
H A Dqcom-msm8974.dtsi2192 gmu_sram: gmu-sram@0 {
/linux/drivers/media/i2c/
H A Dtvaudio.c530 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */