| /freebsd/sys/arm64/arm64/ |
| H A D | gic_v3_var.h | 113 __BUS_ACCESSOR(gicv3, nirqs, GICV3, NIRQS, u_int);
114 __BUS_ACCESSOR(gicv3, redist, GICV3, REDIST, void *);
115 __BUS_ACCESSOR(gicv3, support_lpis, GICV3, SUPPORT_LPIS, bool);
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| H A D | gicv3_its.c | 87 MALLOC_DEFINE(M_GICV3_ITS, "GICv3 ITS",
88 "ARM GICv3 Interrupt Translation Service");
694 device_t gicv3; in gicv3_its_conftable_init() local
709 gicv3 = device_get_parent(sc->dev); in gicv3_its_conftable_init()
710 ctlr = gic_r_read_4(gicv3, GICR_CTLR); in gicv3_its_conftable_init()
712 conf_pa = gic_r_read_8(gicv3, GICR_PROPBASER); in gicv3_its_conftable_init()
716 * it because implementation defined behavior in gicv3 makes it in gicv3_its_conftable_init()
727 panic("gicv3 PROPBASER needs to reuse %#lx, but not reserved", in gicv3_its_conftable_init()
781 device_t gicv3; in its_init_cpu_lpi() local
786 gicv3 = device_get_parent(dev); in its_init_cpu_lpi()
[all …]
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| H A D | gic_v3_fdt.c | 284 * Bus capability support for GICv3.
286 * adds ITS device as a child of GICv3 in Newbus hierarchy.
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| H A D | gic_v3.c | 168 MALLOC_DEFINE(M_GIC_V3, "GICv3", GIC_V3_DEVSTR);
315 mtx_init(&sc->gic_mtx, "GICv3 lock", NULL, MTX_SPIN); in gic_v3_attach()
384 mtx_init(&sc->gic_mbi_mtx, "GICv3 mbi lock", NULL, MTX_DEF); in gic_v3_attach()
404 * defined register, but seems to be implemented in all GICv3 in gic_v3_attach()
1511 * SPI-mapped Message Based Interrupts -- a GICv3 MSI/MSI-X controller.
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| /freebsd/sys/contrib/device-tree/src/arm64/arm/ |
| H A D | foundation-v8-gicv3-psci.dts | 4 * ARMv8 Foundation model DTS (GICv3+PSCI configuration)
8 #include "foundation-v8-gicv3.dtsi"
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| H A D | foundation-v8-gicv3.dts | 5 * ARMv8 Foundation model DTS (GICv3 configuration)
9 #include "foundation-v8-gicv3.dtsi"
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| H A D | foundation-v8-gicv3.dtsi | 4 * ARMv8 Foundation model DTS (GICv3 configuration)
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| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | socionext,synquacer-exiu.txt | 5 level-high type GICv3 SPIs.
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| H A D | socionext,synquacer-exiu.yaml | 15 level-high type GICv3 SPIs.
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| H A D | arm,gic-v3.yaml | 13 AArch64 SMP cores are often associated with a GICv3, providing Private
196 GICv3 has one or more Interrupt Translation Services (ITS) that are
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| /freebsd/tools/boot/ |
| H A D | full-test.readme | 33 '-d trace:gicv3\* -D /tmp/gic.log' for verbose gic tracing (spaces are important).
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| /freebsd/share/man/man4/ |
| H A D | vmm.4 | 53 arm64: The boot CPU must start in EL2 and the system must have a GICv3 interrupt
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| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | brcm,iproc-pcie.txt | 50 On newer iProc platforms, gicv2m or gicv3-its based MSI support should be used
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| /freebsd/sys/contrib/device-tree/Bindings/misc/ |
| H A D | fsl,qoriq-mc.yaml | 48 For GICv3 and GIC ITS bindings, see:
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| H A D | fsl,qoriq-mc.txt | 38 For GICv3 and GIC ITS bindings, see:
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| /freebsd/sys/arm64/vmm/ |
| H A D | vmm_hyp.c | 59 /* Store the GICv3 registers */ in vmm_hyp_reg_store()
453 /* Load the GICv3 registers */ in vmm_hyp_reg_restore()
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| /freebsd/sys/sys/ |
| H A D | efi.h | 207 * this. At present, Linux only uses this as part of its workaround for a GICv3
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| /freebsd/sys/arm64/vmm/io/ |
| H A D | vgic_v3.c | 455 * GICv3 and GICv4, p. 4-464) in vgic_v3_vminit()
1330 * of the GICv3 and GICv4 spec issue H in vgic_register_read()
2299 /* We currently only support the GICv3 */ in vgic_v3_probe()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 812 // GICv3 registers
898 // GICv3 registers
1296 // GICv3 registers
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