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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dqcom,gcc-sc7180.h32 #define GCC_DDRSS_GPU_AXI_CLK 22 macro
H A Dqcom,gcc-sm6350.h39 #define GCC_DDRSS_GPU_AXI_CLK 28 macro
H A Dqcom,sm7150-gcc.h33 #define GCC_DDRSS_GPU_AXI_CLK 21 macro
H A Dqcom,sar2130p-gcc.h24 #define GCC_DDRSS_GPU_AXI_CLK 14 macro
H A Dqcom,qcs615-gcc.h37 #define GCC_DDRSS_GPU_AXI_CLK 27 macro
H A Dqcom,gcc-sc7280.h30 #define GCC_DDRSS_GPU_AXI_CLK 20 macro
H A Dqcom,sm8750-gcc.h23 #define GCC_DDRSS_GPU_AXI_CLK 13 macro
H A Dqcom,milos-gcc.h31 #define GCC_DDRSS_GPU_AXI_CLK 20 macro
H A Dqcom,sm8550-gcc.h24 #define GCC_DDRSS_GPU_AXI_CLK 13 macro
H A Dqcom,qcs8300-gcc.h31 #define GCC_DDRSS_GPU_AXI_CLK 21 macro
H A Dqcom,gcc-sdm845.h28 #define GCC_DDRSS_GPU_AXI_CLK 18 macro
H A Dqcom,gcc-sm8150.h29 #define GCC_DDRSS_GPU_AXI_CLK 19 macro
H A Dqcom,gcc-sm8450.h37 #define GCC_DDRSS_GPU_AXI_CLK 25 macro
H A Dqcom,gcc-sm8250.h31 #define GCC_DDRSS_GPU_AXI_CLK 21 macro
H A Dqcom,gcc-sm8350.h37 #define GCC_DDRSS_GPU_AXI_CLK 25 macro
H A Dqcom,sa8775p-gcc.h36 #define GCC_DDRSS_GPU_AXI_CLK 25 macro
H A Dqcom,gcc-sc8180x.h27 #define GCC_DDRSS_GPU_AXI_CLK 17 macro
H A Dqcom,gcc-sc8280xp.h48 #define GCC_DDRSS_GPU_AXI_CLK 37 macro
H A Dqcom,x1e80100-gcc.h46 #define GCC_DDRSS_GPU_AXI_CLK 36 macro
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dgmu.yaml307 <&gcc GCC_DDRSS_GPU_AXI_CLK>,
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm670.dtsi1490 <&gcc GCC_DDRSS_GPU_AXI_CLK>,
H A Dsm6350.dtsi1523 <&gcc GCC_DDRSS_GPU_AXI_CLK>,
H A Dsar2130p.dtsi1786 <&gcc GCC_DDRSS_GPU_AXI_CLK>,
H A Dsm8350.dtsi2128 <&gcc GCC_DDRSS_GPU_AXI_CLK>,
H A Dsc8180x.dtsi2333 <&gcc GCC_DDRSS_GPU_AXI_CLK>,

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