15def4c47SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 25def4c47SEmmanuel Vadot /* 35def4c47SEmmanuel Vadot * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 45def4c47SEmmanuel Vadot * Copyright (c) 2021, Linaro Ltd. 55def4c47SEmmanuel Vadot */ 65def4c47SEmmanuel Vadot 75def4c47SEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_QCOM_GCC_SC8180X_H 85def4c47SEmmanuel Vadot #define _DT_BINDINGS_CLK_QCOM_GCC_SC8180X_H 95def4c47SEmmanuel Vadot 105def4c47SEmmanuel Vadot #define GCC_AGGRE_NOC_PCIE_TBU_CLK 0 115def4c47SEmmanuel Vadot #define GCC_AGGRE_UFS_CARD_AXI_CLK 1 125def4c47SEmmanuel Vadot #define GCC_AGGRE_UFS_CARD_AXI_HW_CTL_CLK 2 135def4c47SEmmanuel Vadot #define GCC_AGGRE_UFS_PHY_AXI_CLK 3 145def4c47SEmmanuel Vadot #define GCC_AGGRE_UFS_PHY_AXI_HW_CTL_CLK 4 155def4c47SEmmanuel Vadot #define GCC_AGGRE_USB3_MP_AXI_CLK 5 165def4c47SEmmanuel Vadot #define GCC_AGGRE_USB3_PRIM_AXI_CLK 6 175def4c47SEmmanuel Vadot #define GCC_AGGRE_USB3_SEC_AXI_CLK 7 185def4c47SEmmanuel Vadot #define GCC_BOOT_ROM_AHB_CLK 8 195def4c47SEmmanuel Vadot #define GCC_CAMERA_HF_AXI_CLK 9 205def4c47SEmmanuel Vadot #define GCC_CAMERA_SF_AXI_CLK 10 215def4c47SEmmanuel Vadot #define GCC_CFG_NOC_USB3_MP_AXI_CLK 11 225def4c47SEmmanuel Vadot #define GCC_CFG_NOC_USB3_PRIM_AXI_CLK 12 235def4c47SEmmanuel Vadot #define GCC_CFG_NOC_USB3_SEC_AXI_CLK 13 245def4c47SEmmanuel Vadot #define GCC_CPUSS_AHB_CLK 14 255def4c47SEmmanuel Vadot #define GCC_CPUSS_AHB_CLK_SRC 15 265def4c47SEmmanuel Vadot #define GCC_CPUSS_RBCPR_CLK 16 275def4c47SEmmanuel Vadot #define GCC_DDRSS_GPU_AXI_CLK 17 285def4c47SEmmanuel Vadot #define GCC_DISP_HF_AXI_CLK 18 295def4c47SEmmanuel Vadot #define GCC_DISP_SF_AXI_CLK 19 305def4c47SEmmanuel Vadot #define GCC_EMAC_AXI_CLK 20 315def4c47SEmmanuel Vadot #define GCC_EMAC_PTP_CLK 21 325def4c47SEmmanuel Vadot #define GCC_EMAC_PTP_CLK_SRC 22 335def4c47SEmmanuel Vadot #define GCC_EMAC_RGMII_CLK 23 345def4c47SEmmanuel Vadot #define GCC_EMAC_RGMII_CLK_SRC 24 355def4c47SEmmanuel Vadot #define GCC_EMAC_SLV_AHB_CLK 25 365def4c47SEmmanuel Vadot #define GCC_GP1_CLK 26 375def4c47SEmmanuel Vadot #define GCC_GP1_CLK_SRC 27 385def4c47SEmmanuel Vadot #define GCC_GP2_CLK 28 395def4c47SEmmanuel Vadot #define GCC_GP2_CLK_SRC 29 405def4c47SEmmanuel Vadot #define GCC_GP3_CLK 30 415def4c47SEmmanuel Vadot #define GCC_GP3_CLK_SRC 31 425def4c47SEmmanuel Vadot #define GCC_GP4_CLK 32 435def4c47SEmmanuel Vadot #define GCC_GP4_CLK_SRC 33 445def4c47SEmmanuel Vadot #define GCC_GP5_CLK 34 455def4c47SEmmanuel Vadot #define GCC_GP5_CLK_SRC 35 465def4c47SEmmanuel Vadot #define GCC_GPU_GPLL0_CLK_SRC 36 475def4c47SEmmanuel Vadot #define GCC_GPU_GPLL0_DIV_CLK_SRC 37 485def4c47SEmmanuel Vadot #define GCC_GPU_MEMNOC_GFX_CLK 38 495def4c47SEmmanuel Vadot #define GCC_GPU_SNOC_DVM_GFX_CLK 39 505def4c47SEmmanuel Vadot #define GCC_NPU_AT_CLK 40 515def4c47SEmmanuel Vadot #define GCC_NPU_AXI_CLK 41 525def4c47SEmmanuel Vadot #define GCC_NPU_AXI_CLK_SRC 42 535def4c47SEmmanuel Vadot #define GCC_NPU_GPLL0_CLK_SRC 43 545def4c47SEmmanuel Vadot #define GCC_NPU_GPLL0_DIV_CLK_SRC 44 555def4c47SEmmanuel Vadot #define GCC_NPU_TRIG_CLK 45 565def4c47SEmmanuel Vadot #define GCC_PCIE0_PHY_REFGEN_CLK 46 575def4c47SEmmanuel Vadot #define GCC_PCIE1_PHY_REFGEN_CLK 47 585def4c47SEmmanuel Vadot #define GCC_PCIE2_PHY_REFGEN_CLK 48 595def4c47SEmmanuel Vadot #define GCC_PCIE3_PHY_REFGEN_CLK 49 605def4c47SEmmanuel Vadot #define GCC_PCIE_0_AUX_CLK 50 615def4c47SEmmanuel Vadot #define GCC_PCIE_0_AUX_CLK_SRC 51 625def4c47SEmmanuel Vadot #define GCC_PCIE_0_CFG_AHB_CLK 52 635def4c47SEmmanuel Vadot #define GCC_PCIE_0_MSTR_AXI_CLK 53 645def4c47SEmmanuel Vadot #define GCC_PCIE_0_PIPE_CLK 54 655def4c47SEmmanuel Vadot #define GCC_PCIE_0_SLV_AXI_CLK 55 665def4c47SEmmanuel Vadot #define GCC_PCIE_0_SLV_Q2A_AXI_CLK 56 675def4c47SEmmanuel Vadot #define GCC_PCIE_1_AUX_CLK 57 685def4c47SEmmanuel Vadot #define GCC_PCIE_1_AUX_CLK_SRC 58 695def4c47SEmmanuel Vadot #define GCC_PCIE_1_CFG_AHB_CLK 59 705def4c47SEmmanuel Vadot #define GCC_PCIE_1_MSTR_AXI_CLK 60 715def4c47SEmmanuel Vadot #define GCC_PCIE_1_PIPE_CLK 61 725def4c47SEmmanuel Vadot #define GCC_PCIE_1_SLV_AXI_CLK 62 735def4c47SEmmanuel Vadot #define GCC_PCIE_1_SLV_Q2A_AXI_CLK 63 745def4c47SEmmanuel Vadot #define GCC_PCIE_2_AUX_CLK 64 755def4c47SEmmanuel Vadot #define GCC_PCIE_2_AUX_CLK_SRC 65 765def4c47SEmmanuel Vadot #define GCC_PCIE_2_CFG_AHB_CLK 66 775def4c47SEmmanuel Vadot #define GCC_PCIE_2_MSTR_AXI_CLK 67 785def4c47SEmmanuel Vadot #define GCC_PCIE_2_PIPE_CLK 68 795def4c47SEmmanuel Vadot #define GCC_PCIE_2_SLV_AXI_CLK 69 805def4c47SEmmanuel Vadot #define GCC_PCIE_2_SLV_Q2A_AXI_CLK 70 815def4c47SEmmanuel Vadot #define GCC_PCIE_3_AUX_CLK 71 825def4c47SEmmanuel Vadot #define GCC_PCIE_3_AUX_CLK_SRC 72 835def4c47SEmmanuel Vadot #define GCC_PCIE_3_CFG_AHB_CLK 73 845def4c47SEmmanuel Vadot #define GCC_PCIE_3_MSTR_AXI_CLK 74 855def4c47SEmmanuel Vadot #define GCC_PCIE_3_PIPE_CLK 75 865def4c47SEmmanuel Vadot #define GCC_PCIE_3_SLV_AXI_CLK 76 875def4c47SEmmanuel Vadot #define GCC_PCIE_3_SLV_Q2A_AXI_CLK 77 885def4c47SEmmanuel Vadot #define GCC_PCIE_PHY_AUX_CLK 78 895def4c47SEmmanuel Vadot #define GCC_PCIE_PHY_REFGEN_CLK_SRC 79 905def4c47SEmmanuel Vadot #define GCC_PDM2_CLK 80 915def4c47SEmmanuel Vadot #define GCC_PDM2_CLK_SRC 81 925def4c47SEmmanuel Vadot #define GCC_PDM_AHB_CLK 82 935def4c47SEmmanuel Vadot #define GCC_PDM_XO4_CLK 83 945def4c47SEmmanuel Vadot #define GCC_PRNG_AHB_CLK 84 955def4c47SEmmanuel Vadot #define GCC_QMIP_CAMERA_NRT_AHB_CLK 85 965def4c47SEmmanuel Vadot #define GCC_QMIP_CAMERA_RT_AHB_CLK 86 975def4c47SEmmanuel Vadot #define GCC_QMIP_DISP_AHB_CLK 87 985def4c47SEmmanuel Vadot #define GCC_QMIP_VIDEO_CVP_AHB_CLK 88 995def4c47SEmmanuel Vadot #define GCC_QMIP_VIDEO_VCODEC_AHB_CLK 89 1005def4c47SEmmanuel Vadot #define GCC_QSPI_1_CNOC_PERIPH_AHB_CLK 90 1015def4c47SEmmanuel Vadot #define GCC_QSPI_1_CORE_CLK 91 1025def4c47SEmmanuel Vadot #define GCC_QSPI_1_CORE_CLK_SRC 92 1035def4c47SEmmanuel Vadot #define GCC_QSPI_CNOC_PERIPH_AHB_CLK 93 1045def4c47SEmmanuel Vadot #define GCC_QSPI_CORE_CLK 94 1055def4c47SEmmanuel Vadot #define GCC_QSPI_CORE_CLK_SRC 95 1065def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S0_CLK 96 1075def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S0_CLK_SRC 97 1085def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S1_CLK 98 1095def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S1_CLK_SRC 99 1105def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S2_CLK 100 1115def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S2_CLK_SRC 101 1125def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S3_CLK 102 1135def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S3_CLK_SRC 103 1145def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S4_CLK 104 1155def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S4_CLK_SRC 105 1165def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S5_CLK 106 1175def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S5_CLK_SRC 107 1185def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S6_CLK 108 1195def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S6_CLK_SRC 109 1205def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S7_CLK 110 1215def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP0_S7_CLK_SRC 111 1225def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S0_CLK 112 1235def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S0_CLK_SRC 113 1245def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S1_CLK 114 1255def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S1_CLK_SRC 115 1265def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S2_CLK 116 1275def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S2_CLK_SRC 117 1285def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S3_CLK 118 1295def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S3_CLK_SRC 119 1305def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S4_CLK 120 1315def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S4_CLK_SRC 121 1325def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S5_CLK 122 1335def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP1_S5_CLK_SRC 123 1345def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S0_CLK 124 1355def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S0_CLK_SRC 125 1365def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S1_CLK 126 1375def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S1_CLK_SRC 127 1385def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S2_CLK 128 1395def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S2_CLK_SRC 129 1405def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S3_CLK 130 1415def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S3_CLK_SRC 131 1425def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S4_CLK 132 1435def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S4_CLK_SRC 133 1445def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S5_CLK 134 1455def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP2_S5_CLK_SRC 135 1465def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP_0_M_AHB_CLK 136 1475def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP_0_S_AHB_CLK 137 1485def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP_1_M_AHB_CLK 138 1495def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP_1_S_AHB_CLK 139 1505def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP_2_M_AHB_CLK 140 1515def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAP_2_S_AHB_CLK 141 1525def4c47SEmmanuel Vadot #define GCC_SDCC2_AHB_CLK 142 1535def4c47SEmmanuel Vadot #define GCC_SDCC2_APPS_CLK 143 1545def4c47SEmmanuel Vadot #define GCC_SDCC2_APPS_CLK_SRC 144 1555def4c47SEmmanuel Vadot #define GCC_SDCC4_AHB_CLK 145 1565def4c47SEmmanuel Vadot #define GCC_SDCC4_APPS_CLK 146 1575def4c47SEmmanuel Vadot #define GCC_SDCC4_APPS_CLK_SRC 147 1585def4c47SEmmanuel Vadot #define GCC_SYS_NOC_CPUSS_AHB_CLK 148 1595def4c47SEmmanuel Vadot #define GCC_TSIF_AHB_CLK 149 1605def4c47SEmmanuel Vadot #define GCC_TSIF_INACTIVITY_TIMERS_CLK 150 1615def4c47SEmmanuel Vadot #define GCC_TSIF_REF_CLK 151 1625def4c47SEmmanuel Vadot #define GCC_TSIF_REF_CLK_SRC 152 1635def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_AHB_CLK 153 1645def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_AXI_CLK 154 1655def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_AXI_CLK_SRC 155 1665def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_ICE_CORE_CLK 156 1675def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_ICE_CORE_CLK_SRC 157 1685def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_PHY_AUX_CLK 158 1695def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_PHY_AUX_CLK_SRC 159 1705def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_RX_SYMBOL_0_CLK 160 1715def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_RX_SYMBOL_1_CLK 161 1725def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_TX_SYMBOL_0_CLK 162 1735def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_UNIPRO_CORE_CLK 163 1745def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_UNIPRO_CORE_CLK_SRC 164 1755def4c47SEmmanuel Vadot #define GCC_UFS_CARD_AHB_CLK 165 1765def4c47SEmmanuel Vadot #define GCC_UFS_CARD_AXI_CLK 166 1775def4c47SEmmanuel Vadot #define GCC_UFS_CARD_AXI_CLK_SRC 167 1785def4c47SEmmanuel Vadot #define GCC_UFS_CARD_AXI_HW_CTL_CLK 168 1795def4c47SEmmanuel Vadot #define GCC_UFS_CARD_ICE_CORE_CLK 169 1805def4c47SEmmanuel Vadot #define GCC_UFS_CARD_ICE_CORE_CLK_SRC 170 1815def4c47SEmmanuel Vadot #define GCC_UFS_CARD_ICE_CORE_HW_CTL_CLK 171 1825def4c47SEmmanuel Vadot #define GCC_UFS_CARD_PHY_AUX_CLK 172 1835def4c47SEmmanuel Vadot #define GCC_UFS_CARD_PHY_AUX_CLK_SRC 173 1845def4c47SEmmanuel Vadot #define GCC_UFS_CARD_PHY_AUX_HW_CTL_CLK 174 1855def4c47SEmmanuel Vadot #define GCC_UFS_CARD_RX_SYMBOL_0_CLK 175 1865def4c47SEmmanuel Vadot #define GCC_UFS_CARD_RX_SYMBOL_1_CLK 176 1875def4c47SEmmanuel Vadot #define GCC_UFS_CARD_TX_SYMBOL_0_CLK 177 1885def4c47SEmmanuel Vadot #define GCC_UFS_CARD_UNIPRO_CORE_CLK 178 1895def4c47SEmmanuel Vadot #define GCC_UFS_CARD_UNIPRO_CORE_CLK_SRC 179 1905def4c47SEmmanuel Vadot #define GCC_UFS_CARD_UNIPRO_CORE_HW_CTL_CLK 180 1915def4c47SEmmanuel Vadot #define GCC_UFS_PHY_AHB_CLK 181 1925def4c47SEmmanuel Vadot #define GCC_UFS_PHY_AXI_CLK 182 1935def4c47SEmmanuel Vadot #define GCC_UFS_PHY_AXI_CLK_SRC 183 1945def4c47SEmmanuel Vadot #define GCC_UFS_PHY_AXI_HW_CTL_CLK 184 1955def4c47SEmmanuel Vadot #define GCC_UFS_PHY_ICE_CORE_CLK 185 1965def4c47SEmmanuel Vadot #define GCC_UFS_PHY_ICE_CORE_CLK_SRC 186 1975def4c47SEmmanuel Vadot #define GCC_UFS_PHY_ICE_CORE_HW_CTL_CLK 187 1985def4c47SEmmanuel Vadot #define GCC_UFS_PHY_PHY_AUX_CLK 188 1995def4c47SEmmanuel Vadot #define GCC_UFS_PHY_PHY_AUX_CLK_SRC 189 2005def4c47SEmmanuel Vadot #define GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK 190 2015def4c47SEmmanuel Vadot #define GCC_UFS_PHY_RX_SYMBOL_0_CLK 191 2025def4c47SEmmanuel Vadot #define GCC_UFS_PHY_RX_SYMBOL_1_CLK 192 2035def4c47SEmmanuel Vadot #define GCC_UFS_PHY_TX_SYMBOL_0_CLK 193 2045def4c47SEmmanuel Vadot #define GCC_UFS_PHY_UNIPRO_CORE_CLK 194 2055def4c47SEmmanuel Vadot #define GCC_UFS_PHY_UNIPRO_CORE_CLK_SRC 195 2065def4c47SEmmanuel Vadot #define GCC_UFS_PHY_UNIPRO_CORE_HW_CTL_CLK 196 2075def4c47SEmmanuel Vadot #define GCC_USB30_MP_MASTER_CLK 197 2085def4c47SEmmanuel Vadot #define GCC_USB30_MP_MASTER_CLK_SRC 198 2095def4c47SEmmanuel Vadot #define GCC_USB30_MP_MOCK_UTMI_CLK 199 2105def4c47SEmmanuel Vadot #define GCC_USB30_MP_MOCK_UTMI_CLK_SRC 200 2115def4c47SEmmanuel Vadot #define GCC_USB30_MP_SLEEP_CLK 201 2125def4c47SEmmanuel Vadot #define GCC_USB30_PRIM_MASTER_CLK 202 2135def4c47SEmmanuel Vadot #define GCC_USB30_PRIM_MASTER_CLK_SRC 203 2145def4c47SEmmanuel Vadot #define GCC_USB30_PRIM_MOCK_UTMI_CLK 204 2155def4c47SEmmanuel Vadot #define GCC_USB30_PRIM_MOCK_UTMI_CLK_SRC 205 2165def4c47SEmmanuel Vadot #define GCC_USB30_PRIM_SLEEP_CLK 206 2175def4c47SEmmanuel Vadot #define GCC_USB30_SEC_MASTER_CLK 207 2185def4c47SEmmanuel Vadot #define GCC_USB30_SEC_MASTER_CLK_SRC 208 2195def4c47SEmmanuel Vadot #define GCC_USB30_SEC_MOCK_UTMI_CLK 209 2205def4c47SEmmanuel Vadot #define GCC_USB30_SEC_MOCK_UTMI_CLK_SRC 210 2215def4c47SEmmanuel Vadot #define GCC_USB30_SEC_SLEEP_CLK 211 2225def4c47SEmmanuel Vadot #define GCC_USB3_MP_PHY_AUX_CLK 212 2235def4c47SEmmanuel Vadot #define GCC_USB3_MP_PHY_AUX_CLK_SRC 213 2245def4c47SEmmanuel Vadot #define GCC_USB3_MP_PHY_COM_AUX_CLK 214 2255def4c47SEmmanuel Vadot #define GCC_USB3_MP_PHY_PIPE_0_CLK 215 2265def4c47SEmmanuel Vadot #define GCC_USB3_MP_PHY_PIPE_1_CLK 216 2275def4c47SEmmanuel Vadot #define GCC_USB3_PRIM_PHY_AUX_CLK 217 2285def4c47SEmmanuel Vadot #define GCC_USB3_PRIM_PHY_AUX_CLK_SRC 218 2295def4c47SEmmanuel Vadot #define GCC_USB3_PRIM_PHY_COM_AUX_CLK 219 2305def4c47SEmmanuel Vadot #define GCC_USB3_PRIM_PHY_PIPE_CLK 220 2315def4c47SEmmanuel Vadot #define GCC_USB3_SEC_PHY_AUX_CLK 221 2325def4c47SEmmanuel Vadot #define GCC_USB3_SEC_PHY_AUX_CLK_SRC 222 2335def4c47SEmmanuel Vadot #define GCC_USB3_SEC_PHY_COM_AUX_CLK 223 2345def4c47SEmmanuel Vadot #define GCC_USB3_SEC_PHY_PIPE_CLK 224 2355def4c47SEmmanuel Vadot #define GCC_VIDEO_AXI0_CLK 225 2365def4c47SEmmanuel Vadot #define GCC_VIDEO_AXI1_CLK 226 2375def4c47SEmmanuel Vadot #define GCC_VIDEO_AXIC_CLK 227 2385def4c47SEmmanuel Vadot #define GPLL0 228 2395def4c47SEmmanuel Vadot #define GPLL0_OUT_EVEN 229 2405def4c47SEmmanuel Vadot #define GPLL1 230 2415def4c47SEmmanuel Vadot #define GPLL4 231 2425def4c47SEmmanuel Vadot #define GPLL7 232 2435def4c47SEmmanuel Vadot #define GCC_PCIE_0_CLKREF_CLK 233 2445def4c47SEmmanuel Vadot #define GCC_PCIE_1_CLKREF_CLK 234 2455def4c47SEmmanuel Vadot #define GCC_PCIE_2_CLKREF_CLK 235 2465def4c47SEmmanuel Vadot #define GCC_PCIE_3_CLKREF_CLK 236 2475def4c47SEmmanuel Vadot #define GCC_USB3_PRIM_CLKREF_CLK 237 2485def4c47SEmmanuel Vadot #define GCC_USB3_SEC_CLKREF_CLK 238 24901950c46SEmmanuel Vadot #define GCC_UFS_MEM_CLKREF_EN 239 25001950c46SEmmanuel Vadot #define GCC_UFS_CARD_CLKREF_EN 240 251b2d2a78aSEmmanuel Vadot #define GPLL9 241 252*833e5d42SEmmanuel Vadot #define GCC_CAMERA_AHB_CLK 242 253*833e5d42SEmmanuel Vadot #define GCC_CAMERA_XO_CLK 243 254*833e5d42SEmmanuel Vadot #define GCC_CPUSS_DVM_BUS_CLK 244 255*833e5d42SEmmanuel Vadot #define GCC_CPUSS_GNOC_CLK 245 256*833e5d42SEmmanuel Vadot #define GCC_DISP_AHB_CLK 246 257*833e5d42SEmmanuel Vadot #define GCC_DISP_XO_CLK 247 258*833e5d42SEmmanuel Vadot #define GCC_GPU_CFG_AHB_CLK 248 259*833e5d42SEmmanuel Vadot #define GCC_NPU_CFG_AHB_CLK 249 260*833e5d42SEmmanuel Vadot #define GCC_VIDEO_AHB_CLK 250 261*833e5d42SEmmanuel Vadot #define GCC_VIDEO_XO_CLK 251 2625def4c47SEmmanuel Vadot 2635def4c47SEmmanuel Vadot #define GCC_EMAC_BCR 0 2645def4c47SEmmanuel Vadot #define GCC_GPU_BCR 1 2655def4c47SEmmanuel Vadot #define GCC_MMSS_BCR 2 2665def4c47SEmmanuel Vadot #define GCC_NPU_BCR 3 2675def4c47SEmmanuel Vadot #define GCC_PCIE_0_BCR 4 2685def4c47SEmmanuel Vadot #define GCC_PCIE_0_PHY_BCR 5 2695def4c47SEmmanuel Vadot #define GCC_PCIE_1_BCR 6 2705def4c47SEmmanuel Vadot #define GCC_PCIE_1_PHY_BCR 7 2715def4c47SEmmanuel Vadot #define GCC_PCIE_2_BCR 8 2725def4c47SEmmanuel Vadot #define GCC_PCIE_2_PHY_BCR 9 2735def4c47SEmmanuel Vadot #define GCC_PCIE_3_BCR 10 2745def4c47SEmmanuel Vadot #define GCC_PCIE_3_PHY_BCR 11 2755def4c47SEmmanuel Vadot #define GCC_PCIE_PHY_BCR 12 2765def4c47SEmmanuel Vadot #define GCC_PDM_BCR 13 2775def4c47SEmmanuel Vadot #define GCC_PRNG_BCR 14 2785def4c47SEmmanuel Vadot #define GCC_QSPI_1_BCR 15 2795def4c47SEmmanuel Vadot #define GCC_QSPI_BCR 16 2805def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAPPER_0_BCR 17 2815def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAPPER_1_BCR 18 2825def4c47SEmmanuel Vadot #define GCC_QUPV3_WRAPPER_2_BCR 19 2835def4c47SEmmanuel Vadot #define GCC_QUSB2PHY_5_BCR 20 2845def4c47SEmmanuel Vadot #define GCC_QUSB2PHY_MP0_BCR 21 2855def4c47SEmmanuel Vadot #define GCC_QUSB2PHY_MP1_BCR 22 2865def4c47SEmmanuel Vadot #define GCC_QUSB2PHY_PRIM_BCR 23 2875def4c47SEmmanuel Vadot #define GCC_QUSB2PHY_SEC_BCR 24 2885def4c47SEmmanuel Vadot #define GCC_USB3_PHY_PRIM_SP0_BCR 25 2895def4c47SEmmanuel Vadot #define GCC_USB3_PHY_PRIM_SP1_BCR 26 2905def4c47SEmmanuel Vadot #define GCC_USB3_DP_PHY_PRIM_SP0_BCR 27 2915def4c47SEmmanuel Vadot #define GCC_USB3_DP_PHY_PRIM_SP1_BCR 28 2925def4c47SEmmanuel Vadot #define GCC_USB3_PHY_SEC_BCR 29 2935def4c47SEmmanuel Vadot #define GCC_USB3PHY_PHY_SEC_BCR 30 2945def4c47SEmmanuel Vadot #define GCC_SDCC2_BCR 31 2955def4c47SEmmanuel Vadot #define GCC_SDCC4_BCR 32 2965def4c47SEmmanuel Vadot #define GCC_TSIF_BCR 33 2975def4c47SEmmanuel Vadot #define GCC_UFS_CARD_2_BCR 34 2985def4c47SEmmanuel Vadot #define GCC_UFS_CARD_BCR 35 2995def4c47SEmmanuel Vadot #define GCC_UFS_PHY_BCR 36 3005def4c47SEmmanuel Vadot #define GCC_USB30_MP_BCR 37 3015def4c47SEmmanuel Vadot #define GCC_USB30_PRIM_BCR 38 3025def4c47SEmmanuel Vadot #define GCC_USB30_SEC_BCR 39 3035def4c47SEmmanuel Vadot #define GCC_USB_PHY_CFG_AHB2PHY_BCR 40 3045def4c47SEmmanuel Vadot #define GCC_VIDEO_AXIC_CLK_BCR 41 3055def4c47SEmmanuel Vadot #define GCC_VIDEO_AXI0_CLK_BCR 42 3065def4c47SEmmanuel Vadot #define GCC_VIDEO_AXI1_CLK_BCR 43 3075def4c47SEmmanuel Vadot #define GCC_USB3_DP_PHY_SEC_BCR 44 308b2d2a78aSEmmanuel Vadot #define GCC_USB3_UNIPHY_MP0_BCR 45 309b2d2a78aSEmmanuel Vadot #define GCC_USB3_UNIPHY_MP1_BCR 46 310b2d2a78aSEmmanuel Vadot #define GCC_USB3UNIPHY_PHY_MP0_BCR 47 311b2d2a78aSEmmanuel Vadot #define GCC_USB3UNIPHY_PHY_MP1_BCR 48 3125def4c47SEmmanuel Vadot 3135def4c47SEmmanuel Vadot /* GCC GDSCRs */ 3145def4c47SEmmanuel Vadot #define EMAC_GDSC 0 3155def4c47SEmmanuel Vadot #define PCIE_0_GDSC 1 3165def4c47SEmmanuel Vadot #define PCIE_1_GDSC 2 3175def4c47SEmmanuel Vadot #define PCIE_2_GDSC 3 3185def4c47SEmmanuel Vadot #define PCIE_3_GDSC 4 3195def4c47SEmmanuel Vadot #define UFS_CARD_2_GDSC 5 3205def4c47SEmmanuel Vadot #define UFS_CARD_GDSC 6 3215def4c47SEmmanuel Vadot #define UFS_PHY_GDSC 7 3225def4c47SEmmanuel Vadot #define USB30_MP_GDSC 8 3235def4c47SEmmanuel Vadot #define USB30_PRIM_GDSC 9 3245def4c47SEmmanuel Vadot #define USB30_SEC_GDSC 10 3255def4c47SEmmanuel Vadot 3265def4c47SEmmanuel Vadot #endif 327