/linux/drivers/mtd/spi-nor/ |
H A D | Kconfig | 32 bool "Disable SWP on any flashes (legacy behavior)" 35 flashes at boot-up. 44 bool "Disable SWP on flashes w/ volatile protection bits" 46 Some SPI flashes have volatile block protection bits, ie. after a 51 of flashes while keeping it enabled for any other SPI flashes 64 SPI flashes will not be changed. If your flash is software write
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H A D | otp.c | 3 * OTP support for SPI NOR flashes 30 * This method is used on GigaDevice and Winbond flashes. 77 * This method is used on GigaDevice and Winbond flashes. 102 * flashes only have one page per security register. in spi_nor_otp_write_secr() 133 * This method is used on GigaDevice and Winbond flashes. 171 * GigaDevice and Winbond flashes. 203 * method is used on GigaDevice and Winbond flashes. 496 * Some SPI NOR flashes like Macronix ones can be ordered in two in spi_nor_set_mtd_otp_ops()
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H A D | core.h | 14 * 256 bytes is a sane default for most older flashes. Newer flashes will 342 * ECC unit size for ECC-ed flashes. 369 * @ready: (optional) flashes might use a different mechanism 499 * hooks to differentiate support between flashes of the same
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H A D | winbond.c | 293 * flashes. 343 * it is Winbond specific. Since we do not know if other Winbond flashes in winbond_nor_late_init()
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/linux/drivers/mtd/devices/ |
H A D | bcm47xxsflash.h | 9 /* Used for ST flashes only. */ 24 /* Used for Atmel flashes only. */ 45 /* Status register bits for ST flashes */ 52 /* Status register bits for Atmel flashes */
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/linux/drivers/mtd/ubi/ |
H A D | Kconfig | 25 The default value should be OK for SLC NAND flashes, NOR flashes and 26 other flashes which have eraseblock life-cycle 100000 or more. 27 However, in case of MLC NAND flashes which typically have eraseblock 42 Valid Blocks) for the flashes' endurance lifetime. The maximum
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/linux/include/linux/mtd/ |
H A D | spi-nor.h | 53 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */ 80 /* Used for SST flashes only. */ 84 /* Used for Macronix and Winbond flashes. */ 88 /* Used for Spansion flashes only. */ 91 /* Used for Micron flashes only. */ 95 /* Used for GigaDevices and Winbond flashes. */
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H A D | ubi.h | 164 * Instead, CFI NOR flashes have a write-buffer of, e.g., 64 bytes, and when 173 * E.g., some NOR flashes may have (@min_io_size = 1, @max_write_size = 64). In 174 * contrast, NAND flashes usually have @min_io_size = @max_write_size = NAND
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H A D | spear_smi.h | 55 * num_flashes: number of flashes present on board
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/linux/Documentation/filesystems/ |
H A D | ubifs.rst | 31 typically 100K-1G for SLC NAND and NOR flashes, and 1K-10K for MLC 32 NAND flashes. Blocks do not have the wear-out property. 33 5 Eraseblocks may become bad (only on NAND flashes) and software should
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/linux/Documentation/devicetree/bindings/mtd/ |
H A D | mtd.yaml | 57 An OTP memory region. Some flashes provide a one-time-programmable 59 pre-programmed by the factory. Some flashes might provide both.
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/linux/include/linux/ssb/ |
H A D | ssb_driver_chipcommon.h | 9 * gpio interface, extbus, and support for serial and parallel flashes. 497 /* flashcontrol opcodes for ST flashes */ 511 /* Status register bits for ST flashes */ 518 /* flashcontrol opcodes for Atmel flashes */ 541 /* Status register bits for Atmel flashes */
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/linux/Documentation/userspace-api/media/v4l/ |
H A D | ext-ctrls-flash.rst | 185 Is the flash ready to strobe? Xenon flashes require their capacitors 186 charged before strobing. LED flashes often require a cooldown period
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/linux/Documentation/ABI/testing/ |
H A D | sysfs-bus-spi-devices-spi-nor | 10 non-JEDEC compliant flashes.
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/linux/arch/powerpc/boot/dts/fsl/ |
H A D | p1020rdb_36b.dts | 20 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
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H A D | p1020rdb.dts | 20 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
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H A D | p1010rdb_36b.dtsi | 40 /* NOR, NAND Flashes and CPLD on board */
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H A D | p1010rdb_32b.dtsi | 40 /* NOR, NAND Flashes and CPLD on board */
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H A D | p2020rdb-pc_36b.dts | 48 /* NOR and NAND Flashes */
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H A D | p1021rdb-pc_36b.dts | 47 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
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H A D | p1020rdb-pc_32b.dts | 47 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
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/linux/Documentation/devicetree/bindings/leds/ |
H A D | common.yaml | 88 # LED "double" flashes at a load average based rate 96 # LED flashes at a fixed, configurable rate
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/linux/include/linux/bcma/ |
H A D | bcma_driver_chipcommon.h | 145 /* Flashcontrol action + opcodes for ST flashes */ 158 /* Flashcontrol action + opcodes for Atmel flashes */ 180 /* Status register bits for ST flashes */ 186 /* Status register bits for Atmel flashes */
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/linux/include/uapi/mtd/ |
H A D | mtd-abi.h | 251 * modes (see "struct mtd_write_req"). This ioctl is not supported for flashes 259 * modes (see "struct mtd_read_req"). This ioctl is not supported for flashes
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/linux/Documentation/devicetree/bindings/memory-controllers/fsl/ |
H A D | fsl,ifc.yaml | 93 /* NOR, NAND Flashes and CPLD on board */
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