FIQ\-based (full) in projects: freebsd - OpenGrok search results

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Searched +full:fiq +full:- +full:based (Results 1 – 12 of 12) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A D	apple,aic2.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hector Martin <marcan@marcan.st> 18 - Level-triggered hardware IRQs wired to SoC blocks 19 - Single mask bit per IRQ 20 - Automatic masking on event delivery (auto-ack) 21 - Software triggering (ORed with hw line) 22 - Automatic prioritization (single event/ack register per CPU, lower IRQs = [all …]
H A D	st,sti-irq-syscfg.txt	2 ----------------------------------------------------------- 4 On STi based systems; External, CTI (Core Sight), PMU (Performance Management), 9 - compatible : Should be "st,stih407-irq-syscfg" 10 - st,syscfg : Phandle to Cortex-A9 IRQ system config registers 11 - st,irq-device : Array of IRQs to enable - should be 2 in length 12 - st,fiq-device : Array of FIQs to enable - should be 2 in length 15 - st,invert-ext : External IRQs can be inverted at will. This property inverts 23 irq-syscfg { 24 compatible = "st,stih407-irq-syscfg"; 26 st,irq-device = <ST_IRQ_SYSCFG_PMU_0>, [all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A D	fsl,ssi.txt	`4 be programmed in AC97, I2S, left-justified, or right-justified modes. 7 - compatible: Compatible list, should contain one of the following 9 fsl,mpc8610-ssi 10 fsl,imx51-ssi 11 fsl,imx35-ssi 12 fsl,imx21-ssi 13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on. 14 - reg: Offset and length of the register set for the device. 15 - interrupts: <a b> where a is the interrupt number and b is a 18 encoded based on the information in section 2) [all …]`
/freebsd/secure/lib/libcrypto/man/man7/
H A D	EVP_PKEY-DH.7	18 .\" Set up some character translations and predefined strings. \(-- will 24 .tr \(W- 27 . ds -- \(W- 29 . if (\n(.H=4u)&(1m=24u) .ds -- \(W\h'-12u'\(W\h'-12u'-\" diablo 10 pitch 30 . if (\n(.H=4u)&(1m=20u) .ds -- \(W\h'-12u'\(W\h'-8u'-\" diablo 12 pitch 37 . ds -- \\|\(em\\| 71 .\" Fear. Run. Save yourself. No user-serviceable parts. 81 . ds #H ((1u-(\\\\n(.fu%2u)).13m) 97 . ds ' \\k:\h'-(\\n(.wu8/10-\(#H)'\'\h"\|\\n:u" 98 . ds ` \\k:\h'-(\\n(.wu8/10-\(#H)'\`\h'\|\\n:u' [all …]
/freebsd/sys/arm/arm/
H A D	exception.S	3 /- 4 Copyright (c) 1994-1997 Mark Brinicombe. 45 * Based on kate/display/abort.s 77 * PUSHFRAME - macro to push a trap frame on the stack in the current mode 82 str lr, [sp, #-4]!; /* Push the return address / \ 84 stmia sp, {r0-r12}; / Push the user mode registers / \ 86 stmia r0, {r13-r14}^; / Push the user mode registers / \ 89 str r0, [sp, #-4]!; 92 PULLFRAME - macro to pull a trap frame from the stack in the current mode 100 ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \ [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/elkhartlake/
H A D	pipeline.json	`109 …-speculative execution path is known. The branch prediction unit (BPU) predicts the target address… 267 …ber of machine clears including memory ordering, memory disambiguation, self-modifying code, page … 363 … consumed by the backend due to IEC or FPC RAT stalls, which can be due to FIQ or IEC reservation … 518 …tion": "Counts the number of uops that are from complex flows issued by the micro-sequencer (MS).",`
/freebsd/lib/libpmc/pmu-events/arch/x86/tremontx/
H A D	pipeline.json	109 …-speculative execution path is known. The branch prediction unit (BPU) predicts the target address… 278 … to be store forward blocked, but subsequently is shown not to be blocked based on 4K alias check.… 343 …ounts the number of machine clears due to a page fault. Counts both I-Side and D-Side (Loads/Stor… 453 … consumed by the backend due to IEC or FPC RAT stalls, which can be due to FIQ or IEC reservation … 637 …he number of uops issued by the front end every cycle. When 4-uops are requested and only 2-uops a… 662 …tion": "Counts the number of uops that are from complex flows issued by the micro-sequencer (MS).",
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A D	ARMBaseRegisterInfo.cpp	1 //===-- ARMBaseRegisterInfo.cpp - ARM Register Information ----------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 50 #define DEBUG_TYPE "arm-register-info" 64 const ARMSubtarget &STI = MF->getSubtarget<ARMSubtarget>(); in getCalleeSavedRegs() 66 const Function &F = MF->getFunction(); in getCalleeSavedRegs() 83 // M-class CPUs have hardware which saves the registers needed to allow a in getCalleeSavedRegs() 86 } else if (F.getFnAttribute("interrupt").getValueAsString() == "FIQ") { in getCalleeSavedRegs() 87 // Fast interrupt mode gives the handler a private copy of R8-R14, so less in getCalleeSavedRegs() [all …]
H A D	ARMISelLowering.cpp	1 //===- ARMISelLowering.cpp - ARM DAG Lowering Implementation --------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 122 #define DEBUG_TYPE "arm-isel" 131 ARMInterworking("arm-interworking", cl::Hidden, 136 "arm-promote-constant", cl::Hidden, 141 "arm-promote-constant-max-size", cl::Hidden, 145 "arm-promote-constant-max-total", cl::Hidden, 150 MVEMaxSupportedInterleaveFactor("mve-max-interleave-factor", cl::Hidden, [all …]
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A D	AttrDocs.td	1 //==--- AttrDocs.td - Attribute documentation ----------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===---------------------------------------------------------------------===// 9 // To test that the documentation builds cleanly, you must run clang-tblgen to 15 // To run clang-tblgen to generate the .rst file: 16 // clang-tblgen -gen-attr-docs -I <root>/llvm/tools/clang/include 17 // <root>/llvm/tools/clang/include/clang/Basic/Attr.td -o 20 // To run sphinx to generate the .html files (note that sphinx-build must be 24 // Non-Windows (from within the clang\docs directory): 25 // sphinx-build -b html _build/html [all …]
H A D	Attr.td	1 //==--- Attr.td - attribute definitions -----------------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // The documentation is organized by category. Attributes can have category- 61 // because it is not intended to be user-facing. 84 // A subset-subject is an AttrSubject constrained to operate only on some subset 90 // diagnostic string should be a comma-separated list of subject names. 98 [{S->hasLocalStorage() && !isa<ParmVarDecl>(S)}], 101 [{S->getKind() != Decl::ParmVar}], 104 [{!S->hasLocalStorage()}], [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/
H A D	pipeline.json	134 … to be store forward blocked, but subsequently is shown not to be blocked based on 4K alias check.… 180 …ounts the number of machine clears due to a page fault. Counts both I-Side and D-Side (Loads/Stor… 214 …e number of issue slots not consumed due to a micro-sequencer (MS) scoreboard, which stalls the fr… 311 … consumed by the backend due to IEC or FPC RAT stalls, which can be due to FIQ or IEC reservation … 498 …tion": "Counts the number of uops that are from complex flows issued by the micro-sequencer (MS).", 700 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.", 996 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event", 1007 "BriefDescription": "Number of instructions retired. General Counter - architectural event", 1040 "BriefDescription": "Precise instruction retired with PEBS precise-distribution", 1131 "BriefDescription": "integer ADD, SUB, SAD 128-bit vector instructions.", [all …]