/linux/drivers/gpu/drm/tegra/ |
H A D | dp.h | 31 * training pattern sequence 3 supported for equalization 97 * @channel_equalized: flag to track if channel equalization has completed 131 * @ce: channel equalization read interval
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H A D | dp.c | 209 * and channel equalization should use 100 us or 400 us AUX read in drm_dp_link_probe() 681 /* start channel equalization using pattern 2 or 3 */ in drm_dp_link_channel_equalization() 767 DRM_ERROR("channel equalization failed: %d\n", err); in drm_dp_link_train_full() 772 DRM_ERROR("channel equalization failed, downgrading link\n"); in drm_dp_link_train_full() 781 DRM_DEBUG_KMS("channel equalization succeeded\n"); in drm_dp_link_train_full() 836 DRM_ERROR("channel equalization failed\n"); in drm_dp_link_train_fast()
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/linux/drivers/gpu/drm/amd/display/dc/link/protocols/ |
H A D | link_dp_training_dpia.c | 566 /* Execute equalization phase of link training for specified hop in display 609 /* DPTX-to-DPIA equalization always successful. */ in dpia_training_eq_non_transparent() 702 "%s\n DPIA(%d) equalization\n - hop(%d)\n - result(%d)\n - retries(%d)\n - status(%d)\n", in dpia_training_eq_non_transparent() 713 /* Execute equalization phase of link training for specified hop in display 716 * - driver writes TPSx to DPCD to notify DPIA that is in equalization phase. 717 * - equalization (EQ) for link is handled by DPOA, which reports result to DPIA on completion. 788 DC_LOG_HW_LINK_TRAINING("%s\n DPIA(%d) equalization\n - hop(%d)\n - result(%d)\n - retries(%d)\n", in dpia_training_eq_transparent() 798 /* Execute equalization phase of link training for specified hop in display 914 /* Return status read interval during equalization phase. */ 1016 /* Equalization. */ in dpia_perform_link_training()
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H A D | link_dp_training_auxless.c | 62 /* transmit training pattern for channel equalization. */ in dp_perform_link_training_skip_aux()
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H A D | link_dp_irq_handler.c | 76 /* if one of the channel equalization, clock in dp_parse_link_loss_status()
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H A D | link_dp_training.c | 410 /* Only used for channel equalization */ 581 /* if one of the channel equalization, clock in dp_check_link_loss_status()
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/linux/drivers/pci/controller/dwc/ |
H A D | pcie-qcom-common.c | 16 * GEN3_RELATED_OFF register is repurposed to apply equalization in qcom_pcie_common_set_16gt_equalization() 19 * determines the data rate for which these equalization settings are in qcom_pcie_common_set_16gt_equalization()
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/linux/drivers/infiniband/hw/hfi1/ |
H A D | qsfp.h | 66 /* Active Equalization includes fiber, copper full EQ, and copper near Eq */ 68 /* Active Equalization includes fiber, copper full EQ, and copper far Eq */
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H A D | pcie.c | 640 /* equalization columns */ 645 /* discrete silicon preliminary equalization values */ 661 /* integrated silicon preliminary equalization values */ 1046 * Leave at reset value. No need to set PerfEq - link equalization in do_pcie_gen3_transition() 1143 /* disable pCal for PCIe Gen3 RX equalization */ in do_pcie_gen3_transition() 1148 * Enable iCal for PCIe Gen3 RX equalization, and set which in do_pcie_gen3_transition()
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/linux/drivers/infiniband/hw/qib/ |
H A D | qib_qsfp.h | 81 /* Active Equalization includes fiber, copper full EQ, and copper near Eq */ 83 /* Active Equalization includes fiber, copper full EQ, and copper far Eq */
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H A D | qib_sd7220.c | 119 * be reset at will, and Automatic Equalization may require it. So the 1238 * The "default" values for Rx equalization are also stored to 1247 "Which set [0..3] of Rx Equalization values is default");
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/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_tv_regs.h | 260 /* Enables generation of the equalization signal */ 265 /* Offset of the start of equalization in field 1, measured in one less than 271 * Offset of the start of equalization in field 2, measured in one less than
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H A D | intel_dp_link_training.c | 951 * Pick Training Pattern Sequence (TPS) for channel equalization. 128b/132b TPS2 1008 * Perform the link training channel equalization phase on the given DP PHY 1032 /* channel equalization */ in intel_dp_link_training_channel_equalization() 1035 lt_err(intel_dp, dp_phy, "Failed to start channel equalization\n"); in intel_dp_link_training_channel_equalization() 1053 "Clock recovery check failed, cannot continue channel equalization\n"); in intel_dp_link_training_channel_equalization() 1076 lt_dbg(intel_dp, dp_phy, "Channel equalization failed 5 times\n"); in intel_dp_link_training_channel_equalization()
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/linux/drivers/gpu/drm/hisilicon/hibmc/dp/ |
H A D | dp_link.c | 246 drm_dbg_dp(dp->dev, "cannot continue channel equalization\n"); in hibmc_dp_link_training_channel_eq() 268 drm_err(dp->dev, "channel equalization failed %u times\n", eq_tries); in hibmc_dp_link_training_channel_eq()
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/linux/drivers/net/ethernet/realtek/ |
H A D | Kconfig | 69 bool "Support for uncommon RTL-8139 rev. K (automatic channel equalization)"
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | baikal,bt1-pcie.yaml | 42 MSI, AER, PME, Hot-plug, Link Bandwidth Management, Link Equalization
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H A D | snps,dw-pcie-ep.yaml | 130 Link Equalization Request flag is set in the Link Status 2
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H A D | snps,dw-pcie-common.yaml | 52 bandwidth change, link equalization request, INTx asserted/deasserted
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/linux/drivers/media/pci/cx18/ |
H A D | cx18-av-core.c | 302 * 5 (625) or 6 (525) half-lines of equalization pulses in cx18_av_std_setup() 308 * 10 = vblank656 - vblank = vsync pulses + equalization pulses in cx18_av_std_setup() 319 * 5 or 4 equalization pulses (start of line 6 or 318) in cx18_av_std_setup() 380 * 12 = vblank656 - vblank = vsync pulses + equalization pulses in cx18_av_std_setup() 391 * 6 or 5 equalization pulses (start of line 10 or 272) in cx18_av_std_setup()
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/linux/Documentation/devicetree/bindings/sound/ |
H A D | cirrus,cs35l41.yaml | 14 speaker protection and equalization
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/linux/drivers/net/ethernet/intel/ice/ |
H A D | ice_ethtool.h | 44 struct ice_serdes_equalization_to_ethtool equalization[4]; member
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/linux/drivers/phy/amlogic/ |
H A D | phy-meson-g12a-usb3-pcie.c | 227 * Fix RX Equalization setting as follows in phy_g12a_usb3_init()
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/linux/drivers/scsi/isci/ |
H A D | host.c | 1935 /* PM Rx Equalization Save, PM SPhy Rx Acknowledgement in sci_controller_afe_initialization() 2050 /* Enable TX equalization (0xe824) */ in sci_controller_afe_initialization() 2073 /* Enable TX equalization (0xe824) */ in sci_controller_afe_initialization() 2082 /* Enable TX equalization (0xe824) */ in sci_controller_afe_initialization() 2098 /* Enable TX equalization (0xe824) */ in sci_controller_afe_initialization()
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/linux/drivers/phy/qualcomm/ |
H A D | phy-qcom-ipq806x-usb.c | 363 * Fix RX Equalization setting as follows in qcom_ipq806x_usb_ss_phy_init()
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/linux/Documentation/driver-api/media/drivers/ccs/ |
H A D | ccs-regs.asc | 309 # equalization control registers
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