/freebsd/sys/dev/sfxge/common/ |
H A D | hunt_nic.c | 98 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in hunt_board_cfg() local 128 encp->enc_bug35388_workaround = B_TRUE; in hunt_board_cfg() 130 encp->enc_bug35388_workaround = B_FALSE; in hunt_board_cfg() 141 encp->enc_bug41750_workaround = B_TRUE; in hunt_board_cfg() 145 encp->enc_bug41750_workaround = B_TRUE; in hunt_board_cfg() 147 encp->enc_bug41750_workaround = B_FALSE; in hunt_board_cfg() 149 encp->enc_bug41750_workaround = B_FALSE; in hunt_board_cfg() 153 if (EFX_PCI_FUNCTION_IS_VF(encp)) { in hunt_board_cfg() 155 encp->enc_bug41750_workaround = B_TRUE; in hunt_board_cfg() 170 encp->enc_bug26807_workaround = B_TRUE; in hunt_board_cfg() [all …]
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H A D | siena_nic.c | 88 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in siena_board_cfg() local 97 encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K; in siena_board_cfg() 100 encp->enc_external_port = (uint8_t)enp->en_mcdi.em_emip.emi_port; in siena_board_cfg() 107 EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr); in siena_board_cfg() 109 encp->enc_board_type = board_type; in siena_board_cfg() 116 encp->enc_hw_pf_count = 1; in siena_board_cfg() 119 encp->enc_clk_mult = 1; in siena_board_cfg() 125 encp->enc_clk_mult = 2; in siena_board_cfg() 129 encp->enc_evq_timer_quantum_ns = in siena_board_cfg() 130 EFX_EVQ_SIENA_TIMER_QUANTUM_NS / encp->enc_clk_mult; in siena_board_cfg() [all …]
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H A D | medford2_nic.c | 67 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in medford2_board_cfg() local 89 if (EFX_PCI_FUNCTION_IS_VF(encp)) { in medford2_board_cfg() 94 encp->enc_bug41750_workaround = B_TRUE; in medford2_board_cfg() 98 encp->enc_bug26807_workaround = B_TRUE; in medford2_board_cfg() 108 encp->enc_bug61265_workaround = B_TRUE; in medford2_board_cfg() 110 encp->enc_bug61265_workaround = B_FALSE; in medford2_board_cfg() 115 encp->enc_bug61297_workaround = B_FALSE; in medford2_board_cfg() 125 encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */ in medford2_board_cfg() 126 encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns << in medford2_board_cfg() 130 encp->enc_rx_buf_align_start = 1; in medford2_board_cfg() [all …]
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H A D | medford_nic.c | 63 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in medford_board_cfg() local 85 if (EFX_PCI_FUNCTION_IS_VF(encp)) { in medford_board_cfg() 90 encp->enc_bug41750_workaround = B_TRUE; in medford_board_cfg() 94 encp->enc_bug26807_workaround = B_TRUE; in medford_board_cfg() 104 encp->enc_bug61265_workaround = B_TRUE; in medford_board_cfg() 106 encp->enc_bug61265_workaround = B_FALSE; in medford_board_cfg() 111 encp->enc_bug61297_workaround = B_TRUE; in medford_board_cfg() 121 encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */ in medford_board_cfg() 122 encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns << in medford_board_cfg() 126 encp->enc_rx_buf_align_start = 1; in medford_board_cfg() [all …]
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H A D | ef10_nic.c | 911 efx_nic_cfg_t *encp = &enp->en_nic_cfg; in ef10_nic_pio_alloc() local 931 blk_per_buf = encp->enc_piobuf_size / edcp->edc_pio_alloc_size; in ef10_nic_pio_alloc() 1064 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in ef10_get_datapath_caps() local 1070 if ((rc = ef10_mcdi_get_pf_count(enp, &encp->enc_hw_pf_count)) != 0) in ef10_get_datapath_caps() 1108 encp->enc_rx_prefix_size = 14; in ef10_get_datapath_caps() 1113 encp->enc_rx_scale_additional_modes_supported = B_TRUE; in ef10_get_datapath_caps() 1115 encp->enc_rx_scale_additional_modes_supported = B_FALSE; in ef10_get_datapath_caps() 1120 encp->enc_fw_assisted_tso_enabled = B_TRUE; in ef10_get_datapath_caps() 1122 encp->enc_fw_assisted_tso_enabled = B_FALSE; in ef10_get_datapath_caps() 1126 encp->enc_fw_assisted_tso_v2_enabled = B_TRUE; in ef10_get_datapath_caps() [all …]
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H A D | mcdi_mon.c | 446 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in mcdi_mon_stats_update() local 447 uint32_t size = encp->enc_mon_stat_dma_buf_size; in mcdi_mon_stats_update() 456 encp->enc_mcdi_sensor_maskp, in mcdi_mon_stats_update() 457 encp->enc_mcdi_sensor_mask_size, in mcdi_mon_stats_update() 562 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in mcdi_mon_cfg_build() local 569 encp->enc_mon_type = EFX_MON_SFC90X0; in mcdi_mon_cfg_build() 574 encp->enc_mon_type = EFX_MON_SFC91X0; in mcdi_mon_cfg_build() 579 encp->enc_mon_type = EFX_MON_SFC92X0; in mcdi_mon_cfg_build() 584 encp->enc_mon_type = EFX_MON_SFC92X0; in mcdi_mon_cfg_build() 597 encp->enc_mon_stat_dma_buf_size = npages * EFX_MON_STATS_PAGE_SIZE; in mcdi_mon_cfg_build() [all …]
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H A D | efx_nic.c | 448 efx_nic_cfg_t *encp = &enp->en_nic_cfg; in efx_nic_get_vi_pool() local 466 *evq_countp = encp->enc_evq_limit; in efx_nic_get_vi_pool() 467 *rxq_countp = encp->enc_rxq_limit; in efx_nic_get_vi_pool() 468 *txq_countp = encp->enc_txq_limit; in efx_nic_get_vi_pool() 856 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in efx_mcdi_get_loopback_modes() local 895 encp->enc_loopback_types[EFX_LINK_100FDX] = modes; in efx_mcdi_get_loopback_modes() 899 encp->enc_loopback_types[EFX_LINK_1000FDX] = modes; in efx_mcdi_get_loopback_modes() 903 encp->enc_loopback_types[EFX_LINK_10000FDX] = modes; in efx_mcdi_get_loopback_modes() 912 encp->enc_loopback_types[EFX_LINK_40000FDX] = modes; in efx_mcdi_get_loopback_modes() 922 encp->enc_loopback_types[EFX_LINK_25000FDX] = modes; in efx_mcdi_get_loopback_modes() [all …]
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H A D | ef10_mac.c | 248 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in ef10_mac_pdu_set() local 251 if (encp->enc_enhanced_set_mac_supported) { in ef10_mac_pdu_set() 495 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in ef10_mac_stats_get_mask() local 512 if (encp->enc_mac_stats_40g_tx_size_bins) { in ef10_mac_stats_get_mask() 524 if (encp->enc_pm_and_rxdp_counters) { in ef10_mac_stats_get_mask() 534 if (encp->enc_datapath_cap_evb) { in ef10_mac_stats_get_mask() 545 if (encp->enc_fec_counters) { in ef10_mac_stats_get_mask() 555 if (encp->enc_mac_stats_nstats >= MC_CMD_MAC_NSTATS_V4) { in ef10_mac_stats_get_mask() 566 if (encp->enc_hlb_counters) { in ef10_mac_stats_get_mask() 609 const efx_nic_cfg_t *encp = &enp->en_nic_cfg; in ef10_mac_stats_update() local [all …]
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H A D | ef10_rx.c | 53 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in efx_mcdi_init_rxq() local 79 if (encp->enc_tunnel_encapsulations_supported != 0 && in efx_mcdi_init_rxq() 339 efx_nic_cfg_t *encp = &enp->en_nic_cfg; in efx_mcdi_rss_context_set_flags() local 380 if (encp->enc_rx_scale_additional_modes_supported == B_FALSE) in efx_mcdi_rss_context_set_flags() 629 efx_nic_cfg_t *encp = &enp->en_nic_cfg; in ef10_rx_scale_mode_set() local 634 if ((encp->enc_rx_scale_hash_alg_mask & (1U << alg)) == 0 || in ef10_rx_scale_mode_set() 1019 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in ef10_rx_qcreate() local 1033 EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit); in ef10_rx_qcreate() 1043 if (index >= encp->enc_rxq_limit) { in ef10_rx_qcreate() 1105 if (encp->enc_rx_packed_stream_supported == B_FALSE) { in ef10_rx_qcreate() [all …]
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H A D | efx_mon.c | 54 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in efx_mon_name() local 58 EFSYS_ASSERT(encp->enc_mon_type != EFX_MON_INVALID); in efx_mon_name() 59 EFSYS_ASSERT3U(encp->enc_mon_type, <, EFX_MON_NTYPES); in efx_mon_name() 60 return (__efx_mon_name[encp->enc_mon_type]); in efx_mon_name() 78 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in efx_mon_init() local 93 emp->em_type = encp->enc_mon_type; in efx_mon_init() 95 EFSYS_ASSERT(encp->enc_mon_type != EFX_MON_INVALID); in efx_mon_init()
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H A D | efx_mcdi.c | 1464 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in efx_mcdi_get_phy_cfg() local 1493 encp->enc_phy_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_TYPE); in efx_mcdi_get_phy_cfg() 1496 namelen = MIN(sizeof (encp->enc_phy_name) - 1, in efx_mcdi_get_phy_cfg() 1498 (void) memset(encp->enc_phy_name, 0, in efx_mcdi_get_phy_cfg() 1499 sizeof (encp->enc_phy_name)); in efx_mcdi_get_phy_cfg() 1500 memcpy(encp->enc_phy_name, namep, namelen); in efx_mcdi_get_phy_cfg() 1502 (void) memset(encp->enc_phy_revision, 0, in efx_mcdi_get_phy_cfg() 1503 sizeof (encp->enc_phy_revision)); in efx_mcdi_get_phy_cfg() 1504 memcpy(encp->enc_phy_revision, in efx_mcdi_get_phy_cfg() 1506 MIN(sizeof (encp->enc_phy_revision) - 1, in efx_mcdi_get_phy_cfg() [all …]
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H A D | efx_tunnel.c | 274 const efx_nic_cfg_t *encp = &enp->en_nic_cfg; in efx_tunnel_config_udp_add() local 287 if ((encp->enc_tunnel_encapsulations_supported & in efx_tunnel_config_udp_add() 302 encp->enc_tunnel_config_udp_entries_max) { in efx_tunnel_config_udp_add() 434 const efx_nic_cfg_t *encp = &enp->en_nic_cfg; in ef10_udp_encap_supported() local 440 return ((encp->enc_tunnel_encapsulations_supported & in ef10_udp_encap_supported()
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H A D | siena_sram.c | 43 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in siena_sram_init() local 50 rx_base = encp->enc_buftbl_limit; in siena_sram_init() 51 tx_base = rx_base + (encp->enc_rxq_limit * in siena_sram_init()
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H A D | efx_rx.c | 329 efx_nic_cfg_t *encp = &enp->en_nic_cfg; in efx_rx_scale_hash_flags_get() local 338 if ((encp->enc_rx_scale_hash_alg_mask & (1U << hash_alg)) == 0) { in efx_rx_scale_hash_flags_get() 356 if (encp->enc_rx_scale_l4_hash_supported != B_FALSE) { in efx_rx_scale_hash_flags_get() 361 if ((encp->enc_rx_scale_l4_hash_supported != B_FALSE) && in efx_rx_scale_hash_flags_get() 362 (encp->enc_rx_scale_additional_modes_supported != B_FALSE)) { in efx_rx_scale_hash_flags_get() 384 if (encp->enc_rx_scale_additional_modes_supported != B_FALSE) { in efx_rx_scale_hash_flags_get() 559 efx_nic_cfg_t *encp = &enp->en_nic_cfg; in efx_rx_scale_mode_set() local 612 if (encp->enc_rx_scale_additional_modes_supported == B_FALSE) { in efx_rx_scale_mode_set() 625 if (encp->enc_rx_scale_l4_hash_supported == B_TRUE) { in efx_rx_scale_mode_set() 1599 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in siena_rx_qcreate() local [all …]
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H A D | ef10_mcdi.c | 126 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in ef10_mcdi_get_timeout() local 133 if (encp->enc_nvram_update_verify_result_supported != B_FALSE) { in ef10_mcdi_get_timeout() 281 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in ef10_mcdi_feature_supported() local 282 uint32_t privilege_mask = encp->enc_privilege_mask; in ef10_mcdi_feature_supported()
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H A D | efx_phy.c | 82 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in efx_phy_probe() local 88 epp->ep_port = encp->enc_port; in efx_phy_probe() 89 epp->ep_phy_type = encp->enc_phy_type; in efx_phy_probe() 155 efx_nic_cfg_t *encp = (&enp->en_nic_cfg); in efx_phy_led_set() local 168 mask |= encp->enc_led_mask; in efx_phy_led_set()
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H A D | ef10_filter.c | 1046 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in ef10_filter_supported_filters() local 1095 if (encp->enc_tunnel_encapsulations_supported != 0) { in ef10_filter_supported_filters() 1494 efx_nic_cfg_t *encp = &enp->en_nic_cfg; in ef10_filter_get_workarounds() local 1503 encp->enc_bug26807_workaround = B_TRUE; in ef10_filter_get_workarounds() 1505 encp->enc_bug26807_workaround = B_FALSE; in ef10_filter_get_workarounds() 1511 encp->enc_bug26807_workaround = B_FALSE; in ef10_filter_get_workarounds() 1542 efx_nic_cfg_t *encp = &enp->en_nic_cfg; variable 1637 * filters. This ensures that encp->enc_bug26807_workaround matches the 1653 (encp->enc_bug26807_workaround == B_TRUE)) { 1691 (encp->enc_bug26807_workaround == B_TRUE)) { [all …]
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H A D | siena_phy.c | 552 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in siena_phy_stats_update() local 553 uint32_t vmask = encp->enc_mcdi_phy_stat_mask; in siena_phy_stats_update() 585 EFSYS_ASSERT(smask == encp->enc_phy_stat_mask); in siena_phy_stats_update() 651 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); variable 684 encp->enc_phy_type == EFX_PHY_SFT9001B && 763 encp->enc_phy_type == EFX_PHY_QLX111V &&
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H A D | ef10_ev.c | 465 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in ef10_ev_qcreate() local 479 if (index >= encp->enc_evq_limit) { in ef10_ev_qcreate() 484 if (us > encp->enc_evq_timer_max_us) { in ef10_ev_qcreate() 514 if (encp->enc_init_evq_v2_supported) { in ef10_ev_qcreate() 539 boolean_t low_latency = encp->enc_datapath_cap_evb ? 0 : 1; in ef10_ev_qcreate() 677 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in ef10_ev_qmoderate() local 692 if (us > encp->enc_evq_timer_max_us) { in ef10_ev_qmoderate() 704 if (encp->enc_bug61265_workaround) { in ef10_ev_qmoderate() 716 if (encp->enc_bug35388_workaround) { in ef10_ev_qmoderate()
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H A D | efx_tx.c | 843 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in siena_tx_qpace() local 856 timer_period = EFX_TX_PACE_CLOCK_BASE / encp->enc_clk_mult; in siena_tx_qpace() 937 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); in siena_tx_qcreate() local 949 EFSYS_ASSERT(ISP2(encp->enc_txq_max_ndescs)); in siena_tx_qcreate() 957 if (index >= encp->enc_txq_limit) { in siena_tx_qcreate() 962 (1 << size) <= (int)(encp->enc_txq_max_ndescs / EFX_TXQ_MINNDESCS); in siena_tx_qcreate() 966 if (id + (1 << size) >= encp->enc_buftbl_limit) { in siena_tx_qcreate()
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/freebsd/crypto/heimdal/doc/doxyout/hcrypto/man/man3/ |
H A D | hcrypto_des.3 | 31 .RI "void \fBDES_encrypt\fP (uint32_t u[2], DES_key_schedule *ks, int encp)" 34 …void \fBDES_ecb_encrypt\fP (DES_cblock *input, DES_cblock *output, DES_key_schedule *ks, int encp)" 37 …ncrypt\fP (const void *in, void *out, long length, DES_key_schedule *ks, DES_cblock *iv, int encp)" 40 …ncrypt\fP (const void *in, void *out, long length, DES_key_schedule *ks, DES_cblock *iv, int encp)" 43 …DES_cblock *output, DES_key_schedule *ks1, DES_key_schedule *ks2, DES_key_schedule *ks3, int encp)" 46 …th, DES_key_schedule *ks1, DES_key_schedule *ks2, DES_key_schedule *ks3, DES_cblock *iv, int encp)" 49 …(const void *in, void *out, long length, DES_key_schedule *ks, DES_cblock *iv, int *num, int encp)" 92 …crypt (const void * in, void * out, long length, DES_key_schedule * ks, DES_cblock * iv, int encp)" 110 \fIencp\fP if non zero, encrypt. if zero, decrypt. 114 …t void * in, void * out, long length, DES_key_schedule * ks, DES_cblock * iv, int * num, int encp)" [all …]
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/freebsd/crypto/heimdal/doc/doxyout/hcrypto/html/ |
H A D | group__hcrypto__des.html | 39 …2218601d402a895f08813662">DES_encrypt</a> (uint32_t u[2], DES_key_schedule *ks, int encp)</td></tr> 41 …S_ecb_encrypt</a> (DES_cblock *input, DES_cblock *output, DES_key_schedule *ks, int encp)</td></tr> 43 … (const void *in, void *out, long length, DES_key_schedule *ks, DES_cblock *iv, int encp)</td></tr> 45 … (const void *in, void *out, long length, DES_key_schedule *ks, DES_cblock *iv, int encp)</td></tr> 47 …k *output, DES_key_schedule *ks1, DES_key_schedule *ks2, DES_key_schedule *ks3, int encp)</td></tr> 49 …ey_schedule *ks1, DES_key_schedule *ks2, DES_key_schedule *ks3, DES_cblock *iv, int encp)</td></tr> 51 …id *in, void *out, long length, DES_key_schedule *ks, DES_cblock *iv, int *num, int encp)</td></tr> 124 …args="(const void *in, void *out, long length, DES_key_schedule *ks, DES_cblock *iv, int encp)" --> 162 <td class="paramname"> <em>encp</em></td><td> </td> 183 …<tr><td valign="top"></td><td valign="top"><em>encp</em> </td><td>if non zero, encrypt. if ze… [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/ |
H A D | amlogic,meson-vpu.yaml | 23 R |-------| CSC |----| Scalers | | Encp ----------|----|----HDMI-TX----| 51 - ENCP : Progressive Video Encoder for HDMI 56 The ENCI and ENCP are connected to an on-chip HDMI Transceiver.
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H A D | amlogic,meson-dw-hdmi.yaml | 37 selects either the ENCI encoder for the 576i or 480i formats or the ENCP 40 The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate
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/freebsd/crypto/openssl/test/ |
H A D | ec_internal_test.c | 356 const unsigned char *encp; in decoded_flag_test() local 402 || !TEST_ptr(encp = encodedparams) in decoded_flag_test() 403 || !TEST_ptr(grp_copy = d2i_ECPKParameters(NULL, &encp, encodedlen)) in decoded_flag_test() 423 || !TEST_ptr(encp = encodedparams) in decoded_flag_test() 424 || !TEST_ptr(grp_copy = d2i_ECPKParameters(NULL, &encp, encodedlen)) in decoded_flag_test()
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