98 	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);  in hunt_board_cfg()  local
128 		encp->enc_bug35388_workaround = B_TRUE;  in hunt_board_cfg()
130 		encp->enc_bug35388_workaround = B_FALSE;  in hunt_board_cfg()
141 		encp->enc_bug41750_workaround = B_TRUE;  in hunt_board_cfg()
145 			encp->enc_bug41750_workaround = B_TRUE;  in hunt_board_cfg()
147 			encp->enc_bug41750_workaround = B_FALSE;  in hunt_board_cfg()
149 		encp->enc_bug41750_workaround = B_FALSE;  in hunt_board_cfg()
153 	if (EFX_PCI_FUNCTION_IS_VF(encp)) {  in hunt_board_cfg()
155 		encp->enc_bug41750_workaround = B_TRUE;  in hunt_board_cfg()
170 		encp->enc_bug26807_workaround = B_TRUE;  in hunt_board_cfg()
185 		encp->enc_bug26807_workaround = B_FALSE;  in hunt_board_cfg()
187 		encp->enc_bug26807_workaround = B_FALSE;  in hunt_board_cfg()
200 	encp->enc_evq_timer_quantum_ns = 1536000UL / sysclk; /* 1536 cycles */  in hunt_board_cfg()
201 	if (encp->enc_bug35388_workaround) {  in hunt_board_cfg()
202 		encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<  in hunt_board_cfg()
205 		encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<  in hunt_board_cfg()
209 	encp->enc_bug61265_workaround = B_FALSE; /* Medford only */  in hunt_board_cfg()
212 	encp->enc_bug61297_workaround = B_TRUE;  in hunt_board_cfg()
215 	encp->enc_rx_buf_align_start = 1;  in hunt_board_cfg()
216 	encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */  in hunt_board_cfg()
222 	encp->enc_txq_max_ndescs = encp->enc_bug35388_workaround ? 2048 : 4096;  in hunt_board_cfg()
225 	encp->enc_piobuf_limit = HUNT_PIOBUF_NBUFS;  in hunt_board_cfg()
226 	encp->enc_piobuf_size = HUNT_PIOBUF_SIZE;  in hunt_board_cfg()
227 	encp->enc_piobuf_min_alloc_size = HUNT_MIN_PIO_ALLOC_SIZE;  in hunt_board_cfg()
231 	encp->enc_required_pcie_bandwidth_mbps = bandwidth;  in hunt_board_cfg()
234 	encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;  in hunt_board_cfg()