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/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/
H A D	floating-point.json	15 …nstructions will count twice as noted below. Each count represents 2 computation operations, one … 21 …nstructions will count twice as noted below. Each count represents 2 computation operations, one … 26 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 32 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 37 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 43 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 48 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 54 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 59 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 65 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/
H A D	floating-point.json	15 …nstructions will count twice as noted below. Each count represents 2 computation operations, one … 21 …nstructions will count twice as noted below. Each count represents 2 computation operations, one … 26 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 32 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 37 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 43 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 48 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 54 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 59 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 65 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/
H A D	floating-point.json	14 …nstructions will count twice as noted below. Each count represents 2 computation operations, one … 20 …nstructions will count twice as noted below. Each count represents 2 computation operations, one … 25 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 31 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 36 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 42 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 47 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 53 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 58 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 64 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … [all …]
/freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a510/
H A D	cache.json	114 …"PublicDescription": "L2 cache write streaming mode. This event counts for each cycle where the co… 117 …"BriefDescription": "L2 cache write streaming mode. This event counts for each cycle where the cor… 120 …ion": "L1 data cache entering write streaming mode. This event counts for each entry into write st… 123 …ion": "L1 data cache entering write streaming mode. This event counts for each entry into write st… 126 …"PublicDescription": "L1 data cache write streaming mode. This event counts for each cycle where t… 129 …"BriefDescription": "L1 data cache write streaming mode. This event counts for each cycle where th… 132 …"PublicDescription": "L3 cache write streaming mode. This event counts for each cycle where the co… 135 …"BriefDescription": "L3 cache write streaming mode. This event counts for each cycle where the cor… 138 …"PublicDescription": "Last level cache write streaming mode. This event counts for each cycle wher… 141 …"BriefDescription": "Last level cache write streaming mode. This event counts for each cycle where… [all …]
/freebsd/contrib/mandoc/
H A D	mandoc.db.5	28 Each manual page tree contains its own 60 Each file consists of: 79 The pages table contains one entry for each physical manual page 88 For each page: 103 For each page, the list of names. 104 Each name is preceded by a single byte indicating the sources of the name. 120 For each page, the list of sections. 121 Each section is given as a string, not as a number. 123 For each architecture-dependent page, the list of architectures. 125 For each page, the one-line description string taken from the .Nd macro. [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A D	floating-point.json	8 …nstructions will count twice as noted below. Each count represents 2 computation operations, one … 18 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 28 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 38 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 43 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 48 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 53 …nstructions will count twice as noted below. Each count represents 16 computation operations, one… 58 …nstructions will count twice as noted below. Each count represents 16 computation operations, one… 68 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 78 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … [all …]
/freebsd/contrib/llvm-project/lldb/bindings/interface/
H A D	SBSymbolContextListExtensions.i	68 …y, None, doc='''Returns a list() of lldb.SBModule objects, one for each module in each SBSymbolCon… 69 … doc='''Returns a list() of lldb.SBCompileUnit objects, one for each compile unit in each SBSymbol… 70 …None, doc='''Returns a list() of lldb.SBFunction objects, one for each function in each SBSymbolCo… 71 …ay, None, doc='''Returns a list() of lldb.SBBlock objects, one for each block in each SBSymbolCont… 72 …ne, doc='''Returns a list() of lldb.SBLineEntry objects, one for each line entry in each SBSymbolC… 73 …y, None, doc='''Returns a list() of lldb.SBSymbol objects, one for each symbol in each SBSymbolCon…
/freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/
H A D	floating-point.json	65 …nstructions will count twice as noted below. Each count represents 2 computation operations, one … 71 …nstructions will count twice as noted below. Each count represents 2 computation operations, one … 76 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 82 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 87 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 93 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 98 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 104 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 109 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 115 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … [all …]
/freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a55/
H A D	cache.json	123 …"PublicDescription": "Level 2 cache write streaming mode. This event counts for each cycle where t… 126 …"BriefDescription": "Level 2 cache write streaming mode. This event counts for each cycle where th… 129 …: "Level 1 data cache entering write streaming mode.This event counts for each entry into write-st… 132 …: "Level 1 data cache entering write streaming mode.This event counts for each entry into write-st… 135 …"PublicDescription": "Level 1 data cache write streaming mode.This event counts for each cycle whe… 138 …"BriefDescription": "Level 1 data cache write streaming mode.This event counts for each cycle wher… 141 …"PublicDescription": "Level 3 cache write streaming mode.This event counts for each cycle where th… 144 …"BriefDescription": "Level 3 cache write streaming mode.This event counts for each cycle where the… 171 …This event counts on each access to the IPA cache. +//0 If a single pagewalk needs to make multipl… 174 …This event counts on each access to the IPA cache. +//0 If a single pagewalk needs to make multipl… [all …]
/freebsd/contrib/diff/lib/
H A D	version-etc.c	81 /* TRANSLATORS: Each %s denotes an author name. / in version_etc_va() 85 / TRANSLATORS: Each %s denotes an author name. / in version_etc_va() 89 / TRANSLATORS: Each %s denotes an author name. in version_etc_va() 90 You can use line breaks, estimating that each author name occupies in version_etc_va() 95 /* TRANSLATORS: Each %s denotes an author name. in version_etc_va() 96 You can use line breaks, estimating that each author name occupies in version_etc_va() 101 /* TRANSLATORS: Each %s denotes an author name. in version_etc_va() 102 You can use line breaks, estimating that each author name occupies in version_etc_va() 108 /* TRANSLATORS: Each %s denotes an author name. in version_etc_va() 109 You can use line breaks, estimating that each author name occupies in version_etc_va() [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A D	floating-point.json	8 …nstructions will count twice as noted below. Each count represents 2 computation operations, one … 18 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 28 …nstructions will count twice as noted below. Each count represents 4 computation operations, one … 38 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 43 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 48 …nstructions will count twice as noted below. Each count represents 8 computation operations, one … 53 …nstructions will count twice as noted below. Each count represents 16 computation operations, one… 58 …nstructions will count twice as noted below. Each count represents 16 computation operations, one… 68 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 78 …instructions retired; some instructions will count twice as noted below. Each count represents 1 …
/freebsd/sys/contrib/device-tree/Bindings/display/tegra/
H A D	nvidia,tegra20-host1x.txt	7 For Tegra186, one entry for each entry in reg-names: 18 - resets: Must contain an entry for each entry in reset-names. 28 For each opp entry in 'operating-points-v2' table of host1x and its modules: 36 Each host1x client module having to perform DMA through the Memory Controller 40 The host1x top-level node defines a number of children, each representing one 51 - resets: Must contain an entry for each entry in reset-names. 58 - interconnect-names: Must include name of the interconnect path for each 73 - resets: Must contain an entry for each entry in reset-names. 81 vi can have optional ports node and max 6 ports are supported. Each port 102 Maximum 6 channels are supported with each csi brick as either x4 or x2 [all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A D	pinctrl-bindings.txt	5 controllers. Each pin controller must be represented as a node in device tree, 9 designated client devices. Again, each client device must be represented as a 16 device is inactive. Hence, each client device can define a set of named 35 For each client device individually, every pin state is assigned an integer 36 ID. These numbers start at 0, and are contiguous. For each state ID, a unique 37 property exists to define the pin configuration. Each state may also be 41 Each client device's own binding determines the set of states that must be 47 pinctrl-0: List of phandles, each pointing at a pin configuration 52 from multiple nodes for a single pin controller, each 65 pinctrl-1: List of phandles, each pointing at a pin configuration [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen1/
H A D	floating-point.json	6 …each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may … 13 …each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may … 20 …each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may … 27 …each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may … 34 …each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may … 41 …each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may … 48 …each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may … 55 …each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may … 62 …each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may … 69 …each of the 4 FPU execution pipelines. This event reflects how busy the FPU pipelines are and may …
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A D	nvidia,tegra186-gpio.txt	26 address space, each of which access the same underlying state. See the hardware 31 implemented by the SoC. Each GPIO is assigned to a port, and a port may control 32 a number of GPIOs. Thus, each GPIO is named according to an alphabetical port 36 The number of ports implemented by each GPIO controller varies. The number of 37 implemented GPIOs within each port varies. GPIO registers within a controller 48 Each GPIO controller can generate a number of interrupt signals. Each signal 54 Each GPIO controller in fact generates multiple interrupts signals for each set 55 of ports. Each GPIO may be configured to feed into a specific one of the 56 interrupt signals generated by a set-of-ports. The intent is for each generated 57 signal to be routed to a different CPU, thus allowing different CPUs to each [all …]
H A D	nvidia,tegra186-gpio.yaml	37 aliases" in address space, each of which access the same underlying 42 implemented by the SoC. Each GPIO is assigned to a port, and a port may 43 control a number of GPIOs. Thus, each GPIO is named according to an 47 The number of ports implemented by each GPIO controller varies. The number 48 of implemented GPIOs within each port varies. GPIO registers within a 60 Each GPIO controller can generate a number of interrupt signals. Each 67 Each GPIO controller in fact generates multiple interrupts signals for 68 each set of ports. Each GPIO may be configured to feed into a specific 70 for each generated signal to be routed to a different CPU, thus allowing 71 different CPUs to each handle subsets of the interrupts within a port. [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A D	RISCVInstrFormatsC.td	37 // The immediate value encoding differs for each instruction, so each subclass 39 // The bits Inst{6-2} must be set for each instruction. 52 // The immediate value encoding differs for each instruction, so each subclass 54 // The bits Inst{12-7} must be set for each instruction. 78 // The immediate value encoding differs for each instruction, so each subclass 80 // The bits Inst{12-10} and Inst{6-5} must be set for each instruction. 93 // The immediate value encoding differs for each instruction, so each subclass 95 // The bits Inst{12-10} and Inst{6-5} must be set for each instruction. 160 // The immediate value encoding differs for each instruction, so each subclass 162 // The bits Inst{6-5} must be set for each instruction. [all …]
/freebsd/contrib/sendmail/libmilter/docs/
H A D	overview.html	`49 each corresponding to a connection. 60 For each of N connections 62 For each filter 64 For each filter 66 For each filter 68 MESSAGE:For each message in this connection (sequentially) 70 For each filter 72 For each recipient 74 For each filter 77 For each filter [all …]`
/freebsd/contrib/sendmail/include/sendmail/
H A D	mailstats.h	`32 long stat_nf[MAXMAILERS]; /* # msgs from each mailer / 33 long stat_bf[MAXMAILERS]; / kbytes from each mailer / 34 long stat_nt[MAXMAILERS]; / # msgs to each mailer / 35 long stat_bt[MAXMAILERS]; / kbytes to each mailer / 36 long stat_nr[MAXMAILERS]; / # rejects by each mailer / 37 long stat_nd[MAXMAILERS]; / # discards by each mailer / 38 long stat_nq[MAXMAILERS]; / # quarantines by each mailer */`
/freebsd/sys/contrib/device-tree/Bindings/dma/
H A D	st,stm32-mdma.yaml	13 described in the dma.txt file, using a five-cell specifier for each channel: 24 0x2: Source address pointer is incremented after each data transfer 25 0x3: Source address pointer is decremented after each data transfer 28 0x2: Destination address pointer is incremented after each data transfer 29 0x3: Destination address pointer is decremented after each data transfer 43 0x00: Each MDMA request triggers a buffer transfer (max 128 bytes) 44 0x1: Each MDMA request triggers a block transfer (max 64K bytes) 45 0x2: Each MDMA request triggers a repeated block transfer 46 0x3: Each MDMA request triggers a linked list transfer
/freebsd/sys/contrib/device-tree/Bindings/dma/stm32/
H A D	st,stm32-mdma.yaml	13 described in the dma.txt file, using a five-cell specifier for each channel: 24 0x2: Source address pointer is incremented after each data transfer 25 0x3: Source address pointer is decremented after each data transfer 28 0x2: Destination address pointer is incremented after each data transfer 29 0x3: Destination address pointer is decremented after each data transfer 43 0x00: Each MDMA request triggers a buffer transfer (max 128 bytes) 44 0x1: Each MDMA request triggers a block transfer (max 64K bytes) 45 0x2: Each MDMA request triggers a repeated block transfer 46 0x3: Each MDMA request triggers a linked list transfer
/freebsd/contrib/ntp/html/drivers/
H A D	driver7.html	37 …each broadcast message or burst. As described below, every character is sent twice and, in the cas… 38 …ebsite</a>. A timecode is assembled when all bursts have been received in each minute. The timecod… 41 …each of eight phases of the 300-b/s bit clock. At each phase a new baseband signal from the DSP mo… 42 …isters are processed in round-robin order as the phases of each bit arrive. At the end of each bit… 43 …meout interval, the burst is rejected as a runt and a new burst begun. As each character is receiv… 44 <p>A valid burst consists of ten characters in two replicated five-character blocks, each block rep… 45 <p>The burst distance is incremented by one for each bit in the first block that matches the corres… 47 …Each minute of transmission includes eight format A bursts containing two timecodes for each secon… 48 …each digit of a valid burst is processed, the value at the row corresponding to the digit position… 49 <p>The maximum over all occurrences at each digit position is the distance for that position and th… [all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A D	qcom,lpass-cpu.txt	8 - clocks : Must contain an entry for each entry in clock-names. 22 - interrupts : Must contain an entry for each entry in 26 - pinctrl-N : One property must exist for each entry in 30 - reg : Must contain an address for each entry in reg-names. 43 The SD lines to use can be configured by adding subnodes for each of the DAIs. 45 Required properties for each DAI (represented by a subnode): 49 Each SD line should be represented by a number from 0-3. 51 Each SD line should be represented by a number from 0-3.
/freebsd/share/doc/smm/18.net/
H A D	6.t	45 The following sections describe the properties of each layer 46 in the system and the interfaces to which each must conform. 82 Each socket contains two data queues, \fIso_rcv\fP and \fIso_snd\fP, 216 Each packet begins with an mbuf containing the ``from'' address 261 Each socket is created in a communications domain, 265 Each domain is defined by the following structure: 279 At boot time, each domain configured into the kernel 281 The initialization procedure of each domain is then called. 292 An entry in the ``protocol switch'' table exists for each 354 address of the sender. The PR_ATOMIC flag specifies that each \fIuser\fP [all …]
/freebsd/sys/dev/ixgbe/
H A D	ixgbe_dcb_82599.c	41 * ixgbe_dcb_get_tc_stats_82599 - Returns status for each traffic class 46 * This function returns the status data for each of the Traffic Classes in use. 59 /* Statistics pertaining to each traffic class / in ixgbe_dcb_get_tc_stats_82599() 87 This function returns the CBFC status data for each of the Traffic Classes. 119 * Configure Rx Packet Arbiter and credits for each traffic class. 138 * map all UPs to TCs. up_to_tc_bitmap for each TC has corresponding in ixgbe_dcb_config_rx_arbiter_82599() 181 * Configure Tx Descriptor Arbiter and credits for each traffic class. 230 * Configure Tx Packet Arbiter and credits for each traffic class. 249 * map all UPs to TCs. up_to_tc_bitmap for each TC has corresponding in ixgbe_dcb_config_tx_data_arbiter_82599() 292 * Configure Priority Flow Control (PFC) for each traffic class. [all …]

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