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/linux/tools/testing/selftests/tc-testing/tc-tests/qdiscs/
H A Detf.json4 "name": "Create ETF with default setting",
7 "etf"
14 "cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root etf clockid CLOCK_TAI",
17 …"matchPattern": "qdisc etf 1: root refcnt [0-9]+ clockid TAI delta 0 offload off deadline_mode off…
25 "name": "Create ETF with delta nanos setting",
28 "etf"
35 "cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root etf delta 100 clockid CLOCK_TAI",
38 …"matchPattern": "qdisc etf 1: root refcnt [0-9]+ clockid TAI delta 100 offload off deadline_mode o…
46 "name": "Create ETF with deadline_mode setting",
49 "etf"
[all …]
/linux/drivers/hwtracing/coresight/
H A Dcoresight-kunit-tests.c23 * Source -> ETF -> ETR -> CATU in test_default_sink()
29 *etf = coresight_test_device(dev), in test_default_sink() local
40 etf->type = CORESIGHT_DEV_TYPE_LINKSINK; in test_default_sink()
41 etf->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; in test_default_sink()
47 conn.dest_dev = etf; in test_default_sink()
50 conn.src_dev = etf; in test_default_sink()
52 coresight_add_out_conn(dev, etf->pdata, &conn); in test_default_sink()
H A Dcoresight-tmc-etf.c222 * /dev/xyz.{etf|etb} interface. See tmc_read_unprepare_etf() for in tmc_enable_etf_sink_sysfs()
264 * No need to continue if the ETB/ETF is already operated in tmc_enable_etf_sink_perf()
327 dev_dbg(&csdev->dev, "TMC-ETB/ETF enabled\n"); in tmc_enable_etf_sink()
358 dev_dbg(&csdev->dev, "TMC-ETB/ETF disabled\n"); in tmc_disable_etf_sink()
389 dev_dbg(&csdev->dev, "TMC-ETF enabled\n"); in tmc_enable_etf_link()
416 dev_dbg(&csdev->dev, "TMC-ETF disabled\n"); in tmc_disable_etf_link()
621 /* Proceed only if ETF is enabled or configured as sink */ in tmc_panic_sync_etf()
791 * The ETB/ETF is not tracing and the buffer was just read. in tmc_read_unprepare_etb()
/linux/net/sched/
H A Dsch_etf.c299 struct tc_etf_qopt_offload etf = { }; in etf_disable_offload() local
310 etf.queue = q->queue; in etf_disable_offload()
311 etf.enable = 0; in etf_disable_offload()
313 err = ops->ndo_setup_tc(dev, TC_SETUP_QDISC_ETF, &etf); in etf_disable_offload()
315 pr_warn("Couldn't disable ETF offload for queue %d\n", in etf_disable_offload()
316 etf.queue); in etf_disable_offload()
323 struct tc_etf_qopt_offload etf = { }; in etf_enable_offload() local
327 NL_SET_ERR_MSG(extack, "Specified device does not support ETF offload"); in etf_enable_offload()
331 etf.queue = q->queue; in etf_enable_offload()
332 etf.enable = 1; in etf_enable_offload()
[all …]
H A DKconfig157 tristate "Earliest TxTime First (ETF)"
159 Say Y here if you want to use the Earliest TxTime First (ETF) packet
/linux/Documentation/trace/coresight/
H A Dpanic.rst39 For ETF sink devices, internal SRAM would be used for trace capture,
53 Comparator --->External out --->CTI -->External In---->ETR/ETF stop
59 ETR/ETF/ETB register snapshot etc.
62 the ETR/ETF/ETB device nodes for this.
135 #ETF Flush in trigger from Channel 0
162 echo "ETF CTI config for $i"
350 ETF::
/linux/Documentation/networking/
H A Dxsk-tx-metadata.rst77 compared to the ETF queuing discipline, which organizes packets and delays
99 hardware offload feature can be enabled or disabled by using the tc-etf
115 tc-etf command to call the driver's ndo_setup_tc() callback. When entering
/linux/tools/testing/selftests/net/
H A Dso_txtime.sh93 if ip netns exec "${NS1}" tc qdisc replace dev "${DEV}" root etf clockid CLOCK_TAI delta 400000; th…
100 echo "tc ($(tc -V)) does not support qdisc etf. skipping"
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3660-coresight.dtsi135 etf@ec802000 {
281 etf@ed002000 {
373 etf@ec036000 {
H A Dhi6220-coresight.dtsi38 etf@f6402000 {
/linux/tools/testing/selftests/net/forwarding/
H A Dtc_taprio.sh132 tc qdisc replace dev $if_name parent 100:$((STREAM_PRIO_1 + 1)) etf \
134 tc qdisc replace dev $if_name parent 100:$((STREAM_PRIO_2 + 1)) etf \
136 tc qdisc replace dev $if_name parent 100:$((STREAM_PRIO_3 + 1)) etf \
/linux/arch/arm64/boot/dts/sprd/
H A Dsc9860.dtsi464 etf@11003000 { /* ETF on Cluster0 */
489 etf@11004000 { /* ETF on Cluster1 */
H A Dums512.dtsi484 /* SoC ETF */
551 /* AP-CPU ETF for little cores */
552 etf@3e002000 {
577 /* AP-CPU ETF for big cores */
578 etf@3e003000 {
H A Dsc9836.dtsi47 etf@10003000 {
/linux/arch/arm64/boot/dts/arm/
H A Djuno-r2-scmi.dts9 etf@20140000 {
H A Djuno-r1-scmi.dts9 etf@20140000 {
H A Djuno-cs-r1r2.dtsi26 etf_sys1: etf@20140000 { /* etf1 */
H A Djuno-scmi.dtsi2 etf@20010000 {
/linux/drivers/accel/habanalabs/goya/
H A Dgoya_coresight.c310 dev_err(hdev->dev, "Invalid register index in ETF\n"); in goya_config_etf()
332 "Failed to %s ETF on timeout, error %d\n", in goya_config_etf()
340 "Failed to %s ETF on timeout, error %d\n", in goya_config_etf()
707 dev_err(hdev->dev, "halt ETF failed, %d/%d\n", rc, i); in goya_halt_coresight()
/linux/drivers/accel/habanalabs/gaudi/
H A Dgaudi_coresight.c477 dev_err(hdev->dev, "Invalid register index in ETF\n"); in gaudi_config_etf()
499 "Failed to %s ETF on timeout, error %d\n", in gaudi_config_etf()
507 "Failed to %s ETF on timeout, error %d\n", in gaudi_config_etf()
912 dev_err(hdev->dev, "halt ETF failed, %d/%d\n", rc, i); in gaudi_halt_coresight()
/linux/tools/perf/tests/shell/
H A Dtest_arm_coresight.sh118 # path = '/sys/devices/platform/20010000.etf/tmc_etf0'
/linux/tools/testing/selftests/drivers/net/ocelot/
H A Dpsfp.sh160 tc qdisc replace dev ${if_name} parent 100:$((${STREAM_PRIO} + 1)) etf \
/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2_coresight_regs.h119 /* ETF Offsets - same offsets for all etfs */
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8998-mtp.dts75 &etf {
H A Dapq8016-schneider-hmibsc.dts514 &etf { status = "okay"; };

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