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Searched full:epll (Results 1 – 9 of 9) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dnuvoton,ma35d1-clk.h23 #define EPLL 12 macro
25 /* EPLL divider */
/linux/drivers/clk/nuvoton/
H A Dclk-ma35d1.c104 { .fw_name = "epll", },
508 hws[EPLL] = ma35d1_reg_clk_pll(dev, EPLL, pllmode[3], "epll", in ma35d1_clocks_probe()
513 hws[EPLL_DIV2] = ma35d1_clk_fixed_factor(dev, "epll_div2", "epll", 1, 2); in ma35d1_clocks_probe()
514 hws[EPLL_DIV4] = ma35d1_clk_fixed_factor(dev, "epll_div4", "epll", 1, 4); in ma35d1_clocks_probe()
515 hws[EPLL_DIV8] = ma35d1_clk_fixed_factor(dev, "epll_div8", "epll", 1, 8); in ma35d1_clocks_probe()
H A Dclk-ma35d1-pll.c237 case EPLL: in ma35d1_clk_pll_recalc_rate()
272 case EPLL: in ma35d1_clk_pll_determine_rate()
/linux/Documentation/devicetree/bindings/clock/
H A Dnuvoton,ma35d1-clk.yaml37 EPLL, and VPLL in sequential.
/linux/arch/arm64/boot/dts/nuvoton/
H A Dma35d1-iot-512m.dts44 <&clk EPLL>,
H A Dma35d1-som-256m.dts44 <&clk EPLL>,
/linux/drivers/clk/samsung/
H A Dclk-exynos4.c150 apll, mpll, epll, vpll, enumerator
1156 [epll] = PLL(pll_4600, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
1167 [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
1340 exynos4210_plls[epll].rate_table = in exynos4_clk_init()
1354 exynos4x12_plls[epll].rate_table = in exynos4_clk_init()
/linux/drivers/clk/ingenic/
H A Djz4780-cgu.c305 "epll", CGU_CLK_PLL,
307 .pll = DEF_PLL(EPLL),
H A Dx1830-cgu.c159 "epll", CGU_CLK_PLL,