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/linux/drivers/usb/host/
H A Dehci-hub.c6 /* this file is part of ehci-hcd.c */
11 * EHCI Root Hub ... the nonsharable stuff
22 static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
33 static void ehci_handover_companion_ports(struct ehci_hcd *ehci) in ehci_handover_companion_ports() argument
39 struct usb_hcd *hcd = ehci_to_hcd(ehci); in ehci_handover_companion_ports()
41 if (!ehci->owned_ports) in ehci_handover_companion_ports()
55 port = HCS_N_PORTS(ehci->hcs_params); in ehci_handover_companion_ports()
57 if (test_bit(port, &ehci->owned_ports)) { in ehci_handover_companion_ports()
58 reg = &ehci->regs->port_status[port]; in ehci_handover_companion_ports()
59 status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; in ehci_handover_companion_ports()
[all …]
H A Dehci-timer.c6 /* This file is part of ehci-hcd.c */
11 static void ehci_set_command_bit(struct ehci_hcd *ehci, u32 bit) in ehci_set_command_bit() argument
13 ehci->command |= bit; in ehci_set_command_bit()
14 ehci_writel(ehci, ehci->command, &ehci->regs->command); in ehci_set_command_bit()
17 ehci_readl(ehci, &ehci->regs->command); in ehci_set_command_bit()
21 static void ehci_clear_command_bit(struct ehci_hcd *ehci, u32 bit) in ehci_clear_command_bit() argument
23 ehci->command &= ~bit; in ehci_clear_command_bit()
24 ehci_writel(ehci, ehci->command, &ehci->regs->command); in ehci_clear_command_bit()
27 ehci_readl(ehci, &ehci->regs->command); in ehci_clear_command_bit()
33 * EHCI timer support... Now using hrtimers.
[all …]
H A Dehci-mem.c6 /* this file is part of ehci-hcd.c */
25 static inline void ehci_qtd_init(struct ehci_hcd *ehci, struct ehci_qtd *qtd, in ehci_qtd_init() argument
30 qtd->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); in ehci_qtd_init()
31 qtd->hw_next = EHCI_LIST_END(ehci); in ehci_qtd_init()
32 qtd->hw_alt_next = EHCI_LIST_END(ehci); in ehci_qtd_init()
36 static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, gfp_t flags) in ehci_qtd_alloc() argument
41 qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma); in ehci_qtd_alloc()
43 ehci_qtd_init(ehci, qtd, dma); in ehci_qtd_alloc()
48 static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd) in ehci_qtd_free() argument
50 dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma); in ehci_qtd_free()
[all …]
H A Dehci-sched.c7 /* this file is part of ehci-hcd.c */
12 * EHCI scheduled transaction support: interrupt, iso, split iso
13 * These are called "periodic" transactions in the EHCI spec.
32 periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic, in periodic_next_shadow() argument
35 switch (hc32_to_cpu(ehci, tag)) { in periodic_next_shadow()
49 shadow_next_periodic(struct ehci_hcd *ehci, union ehci_shadow *periodic, in shadow_next_periodic() argument
52 switch (hc32_to_cpu(ehci, tag)) { in shadow_next_periodic()
62 /* caller must hold ehci->lock */
63 static void periodic_unlink(struct ehci_hcd *ehci, unsigned frame, void *ptr) in periodic_unlink() argument
65 union ehci_shadow *prev_p = &ehci->pshadow[frame]; in periodic_unlink()
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H A Dehci-pci.c3 * EHCI HCD (Host Controller Driver) PCI Bus Glue.
14 #include "ehci.h"
17 #define DRIVER_DESC "EHCI PCI platform driver"
19 static const char hcd_name[] = "ehci-pci";
36 * This is the list of PCI IDs for the devices that have EHCI USB class and
63 static int ehci_pci_reinit(struct ehci_hcd *ehci, struct pci_dev *pdev) in ehci_pci_reinit() argument
68 * (currently just BIOS handoff) allowed starting with EHCI 0.96 in ehci_pci_reinit()
74 ehci_dbg(ehci, "MWI active\n"); in ehci_pci_reinit()
82 ehci_writel(ehci, INTEL_QUARK_X1000_EHCI_MAX_THRESHOLD, in ehci_pci_reinit()
83 ehci->regs->intel_quark_x1000_insnreg01); in ehci_pci_reinit()
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H A Dehci-sysfs.c6 /* this file is part of ehci-hcd.c */
14 struct ehci_hcd *ehci; in companion_show() local
19 ehci = hcd_to_ehci(dev_get_drvdata(dev)); in companion_show()
20 nports = HCS_N_PORTS(ehci->hcs_params); in companion_show()
23 if (test_bit(index, &ehci->companion_ports)) { in companion_show()
35 * return control of the port to the EHCI controller.
41 struct ehci_hcd *ehci; in companion_store() local
44 ehci = hcd_to_ehci(dev_get_drvdata(dev)); in companion_store()
50 new_owner = 0; /* Owned by EHCI */ in companion_store()
52 if (portnum <= 0 || portnum > HCS_N_PORTS(ehci->hcs_params)) in companion_store()
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H A DKconfig128 Enables support for XHCI, EHCI and OHCI host controllers
132 modules will be called ohci-platform.ko, ehci-brcm.ko and
139 tristate "EHCI HCD (USB 2.0) support"
142 The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
147 EHCI controllers are packaged with "companion" host controllers (OHCI
149 will connect to EHCI if the device is high speed, otherwise they
150 connect to a companion controller. If you configure EHCI, you should
155 You may want to read <file:Documentation/usb/ehci.rst>.
158 module will be called ehci-hcd.
164 Some EHCI chips have vendor-specific extensions to integrate
[all …]
H A DMakefile37 obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
38 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
39 obj-$(CONFIG_USB_EHCI_HCD_PLATFORM) += ehci-platform.o
40 obj-$(CONFIG_USB_EHCI_HCD_NPCM7XX) += ehci-npcm7xx.o
41 obj-$(CONFIG_USB_EHCI_HCD_OMAP) += ehci-omap.o
42 obj-$(CONFIG_USB_EHCI_HCD_ORION) += ehci-orion.o
43 obj-$(CONFIG_USB_EHCI_HCD_SPEAR) += ehci-spear.o
44 obj-$(CONFIG_USB_EHCI_HCD_STI) += ehci-st.o
45 obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o
46 obj-$(CONFIG_USB_EHCI_HCD_AT91) += ehci-atmel.o
[all …]
H A Dehci-ps3.c3 * PS3 EHCI Host Controller driver
12 static void ps3_ehci_setup_insnreg(struct ehci_hcd *ehci) in ps3_ehci_setup_insnreg() argument
22 /* PS3 EHCI HC errata fix 316 - The PS3 EHCI HC will reset its in ps3_ehci_setup_insnreg()
31 writel_be(0x01000020, (void __iomem *)ehci->regs + in ps3_ehci_setup_insnreg()
36 writel_be(0x00000001, (void __iomem *)ehci->regs + in ps3_ehci_setup_insnreg()
43 struct ehci_hcd *ehci = hcd_to_ehci(hcd); in ps3_ehci_hc_reset() local
45 ehci->big_endian_mmio = 1; in ps3_ehci_hc_reset()
46 ehci->caps = hcd->regs; in ps3_ehci_hc_reset()
52 ps3_ehci_setup_insnreg(ehci); in ps3_ehci_hc_reset()
59 .product_desc = "PS3 EHCI Host Controller",
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H A Dehci-sh.c3 * SuperH EHCI host controller driver
7 * Based on ohci-sh.c and ehci-atmel.c.
19 struct ehci_hcd *ehci = hcd_to_ehci(hcd); in ehci_sh_reset() local
21 ehci->caps = hcd->regs; in ehci_sh_reset()
28 .product_desc = "SuperH EHCI",
/linux/drivers/usb/chipidea/
H A Dhost.c19 #include "../host/ehci.h"
40 struct ehci_hcd *ehci = hcd_to_ehci(hcd); in ehci_ci_portpower()
41 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv; in ehci_ci_portpower()
45 int port = HCS_N_PORTS(ehci->hcs_params); in ehci_ci_portpower()
88 struct ehci_hcd *ehci = hcd_to_ehci(hcd); in ehci_ci_reset()
95 ehci->need_io_watchdog = 0; in ehci_ci_reset()
123 struct ehci_hcd *ehci; in host_start()
149 ehci = hcd_to_ehci(hcd); in host_start()
150 ehci->caps = ci->hw_bank.cap; in host_start()
151 ehci in host_start()
39 struct ehci_hcd *ehci = hcd_to_ehci(hcd); ehci_ci_portpower() local
87 struct ehci_hcd *ehci = hcd_to_ehci(hcd); ehci_ci_reset() local
122 struct ehci_hcd *ehci; host_start() local
249 struct ehci_hcd *ehci = hcd_to_ehci(hcd); ci_ehci_hub_control() local
331 struct ehci_hcd *ehci = hcd_to_ehci(hcd); ci_ehci_bus_suspend() local
[all...]
/linux/Documentation/usb/
H A Dehci.rst2 EHCI driver
7 The EHCI driver is used to talk to high speed USB 2.0 devices using
19 into an EHCI controller, they are given to a USB 1.1 "companion"
22 interact with the EHCI controller through a "Transaction Translator"
27 of EHCI from (in alphabetical order): Intel, NEC, Philips, and VIA.
28 Other EHCI implementations are becoming available from other vendors;
38 Note that USB 2.0 support involves more than just EHCI. It requires
68 since EHCI represents these with a different data structure. So for now,
79 The EHCI root hub code hands off USB 1.1 devices to its companion
82 just because the EHCI driver is also present.
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Domap-usb-host.txt18 "ehci-phy",
19 "ehci-tll",
20 "ehci-hsic",
66 The OMAP HS USB Host subsystem contains EHCI and OHCI controllers.
67 See Documentation/devicetree/bindings/usb/generic-ehci.yaml and
87 usbhsehci: ehci@4a064c00 {
88 compatible = "ti,ehci-omap";
96 port1-mode = "ehci-phy";
97 port2-mode = "ehci-tll";
98 port3-mode = "ehci-phy";
/linux/Documentation/arch/x86/
H A Dearlyprintk.rst25 …ntroller: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #1 (rev 03) (prog-if 20 [EHC…
38 Kernel modules: ehci-hcd
58 The EHCI debug controller is bound to a specific physical USB
60 device in this port. The EHCI host controllers are electrically
61 wired such that the EHCI debug controller is hooked up to the
100 On systems with more than one EHCI debug controller you must
101 specify the correct EHCI debug controller number. The ordering
102 comes from the PCI bus enumeration of the EHCI controllers. The
103 default with no number argument is "0" or the first EHCI debug
104 controller. To use the second EHCI debug controller, you would
/linux/drivers/usb/fotg210/
H A Dfotg210-hcd.h5 #include <linux/usb/ehci-dbgp.h>
7 /* definitions used for the EHCI driver */
59 * ehci-timer.c) in parallel with this list.
202 /* EHCI register interface, corresponds to EHCI Revision 0.95 specification */
233 /* EHCI 1.1 addendum */
311 * EHCI Specification 0.95 Section 3.5
319 /* first part defined by EHCI spec */
320 __hc32 hw_next; /* see EHCI 3.5.1 */
321 __hc32 hw_alt_next; /* see EHCI 3.5.2 */
322 __hc32 hw_token; /* see EHCI 3.5.3 */
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dbrcm,bcm7445-ehci.yaml4 $id: http://devicetree.org/schemas/usb/brcm,bcm7445-ehci.yaml#
7 title: Broadcom STB USB EHCI Controller
17 const: brcm,bcm7445-ehci
27 description: Clock specifier for the EHCI clock
50 compatible = "brcm,bcm7445-ehci";
H A Datmel-usb.txt30 EHCI
33 - compatible: Should be "atmel,at91sam9g45-ehci" for USB controllers
36 - interrupts: Should contain ehci interrupt
46 usb1: ehci@800000 {
47 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
H A Dmarvell,pxau2o-ehci.yaml5 $id: http://devicetree.org/schemas/usb/marvell,pxau2o-ehci.yaml#
8 title: Marvell PXA/MMP EHCI
18 const: marvell,pxau2o-ehci
53 compatible = "marvell,pxau2o-ehci";
H A Dehci-st.txt1 ST USB EHCI controller
4 - compatible : must be "st,st-ehci-300x"
7 - interrupts : one EHCI interrupt should be described here
26 compatible = "st,st-ehci-300x";
H A Dsamsung,exynos-usb2.yaml7 title: Samsung Exynos SoC USB 2.0 EHCI/OHCI Controller
15 - samsung,exynos4210-ehci
43 Only for controller in EHCI mode, if present, specifies the GPIO that
74 compatible = "samsung,exynos4210-ehci";
/linux/drivers/usb/early/
H A Dehci-dbgp.c3 * Standalone EHCI usb debug driver
31 /* The code here is intended to talk directly to the EHCI debug port
61 static int dbgp_not_safe; /* Cannot use debug device during ehci reset */
83 dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs->command)); in dbgp_ehci_status()
84 dbgp_printk(" ehci conf flg: %08x\n", in dbgp_ehci_status()
86 dbgp_printk(" ehci status : %08x", readl(&ehci_regs->status)); in dbgp_ehci_status()
87 dbgp_printk(" ehci portsc : %08x\n", in dbgp_ehci_status()
107 /* Local version of HC_LENGTH macro as ehci struct is not available here */
210 * will be marked as unsafe to use. EHCI reset is the in dbgp_wait_until_done()
438 dbgp_ehci_status("EHCI startup"); in dbgp_ehci_startup()
[all …]
/linux/include/linux/usb/
H A Dehci_def.h9 #include <linux/usb/ehci-dbgp.h>
11 /* EHCI register interface, corresponds to EHCI Revision 0.95 specification */
22 #define HC_LENGTH(ehci, p) (0x00ff&((p) >> /* bits 7:0 / offset 00h */ \ argument
23 (ehci_big_endian_capbase(ehci) ? 24 : 0)))
24 #define HC_VERSION(ehci, p) (0xffff&((p) >> /* bits 31:16 / offset 02h */ \ argument
25 (ehci_big_endian_capbase(ehci) ? 0 : 16)))
37 /* EHCI 1.1 addendum */
59 /* EHCI 1.1 addendum */
119 /* EHCI 1.1 addendum */
167 * its EHCI controller has both TT and LPM support. HOSTPCx are extensions to
/linux/drivers/phy/marvell/
H A DKconfig91 The PHY driver will be used by Marvell ehci driver.
102 The PHY driver will be used by Marvell udc/ehci/otg driver.
113 The PHY driver will be used by Marvell udc/ehci/otg driver.
124 The PHY driver will be used by Marvell udc/ehci/otg driver.
134 Marvell MMP3 SoC. This driver will be used my the Marvell EHCI
/linux/drivers/mfd/
H A Domap-usb-host.c3 * omap-usb-host.c - The USBHS core driver for OMAP EHCI & OHCI
26 #define OMAP_EHCI_DEVICE "ehci-omap"
129 [OMAP_EHCI_PORT_MODE_PHY] = "ehci-phy",
130 [OMAP_EHCI_PORT_MODE_TLL] = "ehci-tll",
131 [OMAP_EHCI_PORT_MODE_HSIC] = "ehci-hsic",
193 struct platform_device *ehci; in omap_usbhs_alloc_children() local
199 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ehci"); in omap_usbhs_alloc_children()
201 dev_err(dev, "EHCI get resource IORESOURCE_MEM failed\n"); in omap_usbhs_alloc_children()
207 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "ehci-irq"); in omap_usbhs_alloc_children()
209 dev_err(dev, " EHCI get resource IORESOURCE_IRQ failed\n"); in omap_usbhs_alloc_children()
[all …]
/linux/Documentation/devicetree/bindings/powerpc/nintendo/
H A Dwii.txt100 1.h) The Enhanced Host Controller Interface (EHCI) node
106 - compatible : should be "nintendo,hollywood-usb-ehci","usb-ehci"
107 - reg : should contain the EHCI registers location and length
108 - interrupts : should contain the EHCI interrupt

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