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/linux/Documentation/devicetree/bindings/display/connector/
H A Dhdmi-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/hdmi-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: hdmi-connector
19 - a # Standard full size
20 - b # Never deployed?
21 - c # Mini
22 - d # Micro
[all …]
/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,exynos4210-hdmi
19 - samsung,exynos4212-hdmi
[all …]
/linux/drivers/gpu/drm/tests/
H A Ddrm_connector_test.c1 // SPDX-License-Identifier: GPL-2.0
25 struct i2c_adapter ddc; member
74 strscpy(priv->ddc.name, "dummy-connector-ddc", sizeof(priv->ddc.name)); in drm_test_connector_init()
75 priv->ddc.owner = THIS_MODULE; in drm_test_connector_init()
76 priv->ddc.algo = &dummy_ddc_algorithm; in drm_test_connector_init()
77 priv->ddc.dev.parent = dev; in drm_test_connector_init()
79 ret = i2c_add_adapter(&priv->ddc); in drm_test_connector_init()
82 ret = kunit_add_action_or_reset(test, i2c_del_adapter_wrapper, &priv->ddc); in drm_test_connector_init()
85 test->priv = priv; in drm_test_connector_init()
95 struct drm_connector_init_priv *priv = test->priv; in drm_test_drmm_connector_init()
[all …]
/linux/drivers/gpu/drm/bridge/
H A Dsil-sii8620.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Copyright (C) 2013-2014 Silicon Image, Inc.
243 /* LM DDC, default value: 0x80 */
252 /* DDC I2C Manual, default value: 0x03 */
263 /* DDC I2C Target Slave Address, default value: 0x00 */
267 /* DDC I2C Target Segment Address, default value: 0x00 */
270 /* DDC I2C Target Offset Address, default value: 0x00 */
273 /* DDC I2C Data In count #1, default value: 0x00 */
276 /* DDC I2C Data In count #2, default value: 0x00 */
280 /* DDC I2C Status, default value: 0x04 */
[all …]
/linux/drivers/video/fbdev/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 a well-defined interface, so the software doesn't need to know
15 anything about the low-level (hardware register) stuff.
21 On several non-X86 architectures, the frame buffer device is the
25 in the /dev directory, i.e. /dev/fb*.
29 and the Framebuffer-HOWTO at
30 <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
40 are compiling a kernel for a non-x86 architecture.
45 (e.g. an accelerated X server) and that are not frame buffer
46 device-aware may cause unexpected results. If unsure, say N.
[all …]
/linux/Documentation/fb/
H A Dintel810.rst20 - Intel 810
21 - Intel 810E
22 - Intel 810-DC100
23 - Intel 815 Internal graphics only, 100Mhz FSB
24 - Intel 815 Internal graphics only
25 - Intel 815 Internal graphics and AGP
30 - Choice of using Discrete Video Timings, VESA Generalized Timing
33 - Supports a variable range of horizontal and vertical resolution and
37 - Supports color depths of 8, 16, 24 and 32 bits per pixel
39 - Supports pseudocolor, directcolor, or truecolor visuals
[all …]
/linux/drivers/video/fbdev/i810/
H A Di810-i2c.c1 /*-*- linux-c -*-
2 * linux/drivers/video/i810-i2c.c -- Intel 810/815 I2C support
45 struct i810fb_par *par = chan->par; in i810i2c_setscl()
46 u8 __iomem *mmio = par->mmio_start_virtual; in i810i2c_setscl()
49 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
51 i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
52 i810_readl(mmio, chan->ddc_base); /* flush posted write */ in i810i2c_setscl()
58 struct i810fb_par *par = chan->par; in i810i2c_setsda()
59 u8 __iomem *mmio = par->mmio_start_virtual; in i810i2c_setsda()
62 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK); in i810i2c_setsda()
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-apalis-v1.2-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis-v1.2.dtsi"
13 compatible = "toradex,apalis-tk1-v1.2-eval", "toradex,apalis-tk1-eval",
14 "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
28 stdout-path = "serial0:115200n8";
40 hdmi-supply = <&reg_5v0>;
46 pex-perst-n-hog {
[all …]
H A Dtegra124-apalis-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis.dtsi"
13 compatible = "toradex,apalis-tk1-eval", "toradex,apalis-tk1",
27 stdout-path = "serial0:115200n8";
39 hdmi-supply = <&reg_5v0>;
45 pex-perst-n-hog {
46 gpio-hog;
[all …]
H A Dtegra20-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
22 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
23 nvidia,hpd-gpio =
25 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
26 vdd-supply = <&reg_3v3_avdd_hdmi>;
31 lan-reset-n-hog {
32 gpio-hog;
34 output-high;
35 line-name = "LAN_RESET#";
38 /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
[all …]
H A Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra20-cpu-opp.dtsi"
9 #include "tegra20-cpu-opp-microvolt.dtsi"
25 stdout-path = "serial0:115200n8";
44 vdd-supply = <&hdmi_vdd_reg>;
45 pll-supply = <&hdmi_pll_reg>;
47 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
H A Dtegra30-apalis-eval.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-apalis.dtsi"
9 compatible = "toradex,apalis_t30-eval", "toradex,apalis_t30",
23 stdout-path = "serial0:115200n8";
46 hdmi-supply = <&reg_5v0>;
52 pex-perst-n-hog {
53 gpio-hog;
55 output-high;
[all …]
H A Dtegra20-colibri-iris.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20-colibri.dtsi"
9 compatible = "toradex,colibri_t20-iris", "toradex,colibri_t20",
22 stdout-path = "serial0:115200n8";
35 hdmi-supply = <&reg_5v0>;
41 bl-on {
45 ddc {
49 hotplug-detect {
[all …]
H A Dtegra30-apalis-v1.1-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-apalis-v1.1.dtsi"
9 compatible = "toradex,apalis_t30-v1.1-eval", "toradex,apalis_t30-eval",
10 "toradex,apalis_t30-v1.1", "toradex,apalis_t30",
24 stdout-path = "serial0:115200n8";
47 hdmi-supply = <&reg_5v0>;
53 pex-perst-n-hog {
54 gpio-hog;
[all …]
H A Dtegra20-colibri-eval-v3.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20-colibri.dtsi"
9 compatible = "toradex,colibri_t20-eval-v3", "toradex,colibri_t20",
22 stdout-path = "serial0:115200n8";
35 hdmi-supply = <&reg_5v0>;
41 bl-on {
45 ddc {
49 hotplug-detect {
[all …]
/linux/drivers/gpu/vga/
H A Dvga_switcheroo.c2 * vga_switcheroo.c - Support for laptop with dual GPU using one set of outputs
33 #include <linux/apple-gmux.h>
65 * while others can switch just the DDC lines. (To allow EDID probing
71 * handler to control the power state of the discrete GPU, its ->switchto
72 * callback is a no-op for obvious reasons. The discrete GPU is often equipped
86 * a client may alternatively request that the DDC lines are temporarily
88 * only the DDC lines and not the entire output avoids unnecessary
93 * struct vga_switcheroo_client - registered client
105 * interface is a no-op so as not to interfere with runtime pm
131 * struct vgasr_priv - vga_switcheroo private data
[all …]
/linux/drivers/gpu/drm/sun4i/
H A Dsun4i_hdmi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
15 #include <media/cec-pin.h>
37 #define SUN4I_HDMI_VID_TIMING_X(x) ((((x) - 1) & GENMASK(11, 0)))
38 #define SUN4I_HDMI_VID_TIMING_Y(y) ((((y) - 1) & GENMASK(11, 0)) << 16)
135 #define SUN4I_HDMI_DDC_FIFO_CTRL_RX_THRES_MAX (BIT(4) - 1)
138 #define SUN4I_HDMI_DDC_FIFO_CTRL_TX_THRES_MAX (BIT(4) - 1)
143 #define SUN4I_HDMI_DDC_BYTE_COUNT_MAX (BIT(10) - 1)
187 /* DDC CLK bit fields are the same, but the formula is not */
226 /* DDC FIFO register offset */
[all …]
H A Dsun4i_hdmi_enc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
37 #define drm_encoder_to_sun4i_hdmi(e) \ argument
38 container_of_const(e, struct sun4i_hdmi, encoder)
51 drm_err(connector->dev, in sun4i_hdmi_write_infoframe()
57 writeb(buffer[i], hdmi->base + SUN4I_HDMI_AVI_INFOFRAME_REG(i)); in sun4i_hdmi_write_infoframe()
71 val = readl(hdmi->base + SUN4I_HDMI_VID_CTRL_REG); in sun4i_hdmi_disable()
73 writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG); in sun4i_hdmi_disable()
75 clk_disable_unprepare(hdmi->tmds_clk); in sun4i_hdmi_disable()
81 struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; in sun4i_hdmi_enable()
[all …]
/linux/include/linux/
H A Dvga_switcheroo.h2 * vga_switcheroo.h - Support for laptop with dual GPU using one set of outputs
39 * enum vga_switcheroo_handler_flags_t - handler flags bitmask
41 * DDC lines separately. This signals to clients that they should call
47 * skip the AUX handshake and set up its output with these pre-calibrated
59 * enum vga_switcheroo_state - client power state
76 * enum vga_switcheroo_client_id - client identifier
94 * struct vga_switcheroo_handler - handler callbacks
96 * Optional. This gets called when vga_switcheroo is enabled, i.e. when
102 * Mandatory. For muxless machines this should be a no-op. Returning 0
105 * @switch_ddc: switch DDC lines to given client.
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-dhcom-pdk3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * PDK3 PCB number: 669-100 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-pdk3", "dh,imx8mp-dhcom-som",
23 stdout-path = &uart1;
[all …]
/linux/arch/mips/boot/dts/ingenic/
H A Dci20.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/clock/ingenic,tcu.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
22 stdout-path = &uart4;
31 gpio-keys {
32 compatible = "gpio-keys";
[all …]
/linux/include/media/i2c/
H A Dtc358743.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * tc358743 - Toshiba HDMI to CSI-2 bridge
10 * REF_01 - Toshiba, TC358743XBG (H2C), Functional Specification, Rev 0.60
11 * REF_02 - Toshiba, TC358743XBG_HDMI-CSI_Tv11p_nm.xls
35 /* DDC +5V debounce delay to avoid spurious interrupts when the cable
46 * level to somewhere in the middle (e.g. 300), so it can cover speed
73 /* DVI->HDMI detection delay to avoid unnecessary switching between DVI
/linux/drivers/gpu/drm/tegra/
H A Ddrm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
60 return dev_get_drvdata(tegra->drm->dev->parent); in tegra_drm_to_host1x()
138 struct i2c_adapter *ddc; member
148 static inline struct tegra_output *encoder_to_output(struct drm_encoder *e) in encoder_to_output() argument
150 return container_of(e, struct tegra_output, encoder); in encoder_to_output()
/linux/drivers/gpu/drm/gma500/
H A Dintel_i2c.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2007 Intel Corporation
11 #include <linux/i2c-algo-bit.h>
26 struct drm_device *dev = chan->drm_dev; in get_clock()
29 val = REG_READ(chan->reg); in get_clock()
36 struct drm_device *dev = chan->drm_dev; in get_data()
39 val = REG_READ(chan->reg); in get_data()
46 struct drm_device *dev = chan->drm_dev; in set_clock()
51 REG_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE | in set_clock()
59 REG_WRITE(chan->reg, reserved | clock_bits); in set_clock()
[all …]
/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
5 * Copyright (C) 2013-2015 Mentor Graphics Inc.
6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
21 #include <linux/dma-mapping.h>
24 #include <media/cec-notifier.h>
26 #include <linux/media-bus-format.h>
40 #include "dw-hdmi-audio.h"
41 #include "dw-hdmi-cec.h"
42 #include "dw-hdmi.h"
[all …]

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