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/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_doorbell.c32 * kernel queues using the first doorbell page reserved for the kernel.
36 * Each device exposes a doorbell aperture, a PCI MMIO aperture that
41 * We map the doorbell address space into user-mode when a process creates
49 /* # of doorbell bytes allocated for each process. */
61 /* Doorbell calculations for device init. */
68 * Todo: KFD kernel level operations need only one doorbell for in kfd_doorbell_init()
70 * kernel, reserve and consume a doorbell from existing KGD kernel in kfd_doorbell_init()
71 * doorbell page. in kfd_doorbell_init()
77 DRM_ERROR("Failed to allocate kernel doorbell bitmap\n"); in kfd_doorbell_init()
81 /* Alloc a doorbell page for KFD kernel usages */ in kfd_doorbell_init()
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/linux/drivers/fpga/
H A Dintel-m10-bmc-sec-update.c262 static void log_error_regs(struct m10bmc_sec *sec, u32 doorbell) in log_error_regs() argument
267 dev_err(sec->dev, "Doorbell: 0x%08x\n", doorbell); in log_error_regs()
276 u32 doorbell; in m10bmc_sec_n3000_rsu_status() local
279 ret = m10bmc_sys_read(sec->m10bmc, csr_map->doorbell, &doorbell); in m10bmc_sec_n3000_rsu_status()
283 return FIELD_GET(DRBL_RSU_STATUS, doorbell); in m10bmc_sec_n3000_rsu_status()
327 ret = m10bmc_sys_read(sec->m10bmc, csr_map->doorbell, doorbell_reg); in m10bmc_sec_progress_status()
344 u32 doorbell; in rsu_check_idle() local
347 ret = m10bmc_sys_read(sec->m10bmc, csr_map->doorbell, &doorbell); in rsu_check_idle()
351 if (!rsu_progress_done(rsu_prog(doorbell))) { in rsu_check_idle()
352 log_error_regs(sec, doorbell); in rsu_check_idle()
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/linux/Documentation/devicetree/bindings/mailbox/
H A Darm,mhu.yaml21 The MHU hardware also allows operations in doorbell mode. The MHU drives the
28 interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote
38 - arm,mhu-doorbell
50 - description: Doorbell mode
52 - const: arm,mhu-doorbell
76 Set to 2 in doorbell mode and represents index of the channel and doorbell
121 # Doorbell mode.
129 compatible = "arm,mhu-doorbell", "arm,primecell";
142 mboxes = <&mhuB 0 0>, /* LP-NonSecure, 1st doorbell */
143 <&mhuB 0 1>; /* LP-NonSecure, 2nd doorbell */
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_doorbell.h28 * GPU doorbell structures, functions & helpers
31 /* doorbell mmio */
46 * KFD can use all the rest in the 2M doorbell bar.
47 * For asic before vega10, doorbell is 32-bit, so the
48 * index/offset is in dword. For vega10 and after, doorbell
93 /* Per engine SDMA doorbell size in dword */
95 /* Per xcc doorbell size for KIQ/KCQ */
148 * overlap the doorbell assignment with VCN as they are mutually exclusive
149 * VCN engine's doorbell is 32 bit and two VCN ring share one QWORD
217 * overlap the doorbell assignment with VCN as they are mutually exclusive
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H A Damdgpu_amdkfd.c81 * amdgpu_doorbell_get_kfd_info - Report doorbell configuration required to
85 * @aperture_base: output returning doorbell aperture base physical address
86 * @aperture_size: output returning doorbell aperture size in bytes
87 * @start_offset: output returning # of doorbell bytes reserved for amdgpu.
89 * amdgpu and amdkfd share the doorbell aperture. amdgpu sets it up,
91 * amdgpu reserved doorbells are at the start of the doorbell aperture.
107 * doorbell space. in amdgpu_doorbell_get_kfd_info()
109 *aperture_base = adev->doorbell.base; in amdgpu_doorbell_get_kfd_info()
112 } else if (adev->doorbell.size > adev->doorbell.num_kernel_doorbells * in amdgpu_doorbell_get_kfd_info()
114 *aperture_base = adev->doorbell.base; in amdgpu_doorbell_get_kfd_info()
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/linux/include/linux/
H A Dntb.h358 /* Doorbell operations are mostly required */ in ntb_dev_ops_is_valid()
524 * ntb_db_event() - notify driver context of a doorbell event
528 * Notify the driver context of a doorbell event. If hardware supports
533 * doorbell bits need service, and ntb_db_vector_mask() to determine which of
970 * ntb_db_is_unsafe() - check if it is safe to use hardware doorbell
988 * ntb_db_valid_mask() - get a mask of doorbell bits supported by the ntb
991 * Hardware may support different number or arrangement of doorbell bits.
993 * Return: A mask of doorbell bits supported by the ntb.
1001 * ntb_db_vector_count() - get the number of doorbell interrupt vectors
1006 * Return: The number of doorbell interrupt vectors.
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H A Drio_drv.h234 * rio_send_doorbell - Send a doorbell message to a device
236 * @data: Doorbell message data
238 * Send a doorbell message to a RIO device. The doorbell message
265 * rio_init_dbell_res - Initialize a RIO doorbell resource
267 * @start: start of doorbell range
268 * @end: end of doorbell range
271 * for use as a doorbell resource. It initializes a range of
272 * doorbell messages using the start and end arguments.
350 /* Doorbell management */
/linux/Documentation/driver-api/
H A Dntb.rst7 fabric. Existing NTB hardware supports a common feature set: doorbell
14 peer. Doorbell registers provide a way for peers to send interrupt events.
138 The Ping Pong test client serves as a demonstration to exercise the doorbell
141 then proceeds to read and write the doorbell scratchpad registers of the NTB.
142 The peers interrupt each other using a bit mask of doorbell bits, which is
143 shifted by one in each round, to test the behavior of multiple doorbell bits
146 round before writing the peer doorbell register.
150 * unsafe - Some hardware has known issues with scratchpad and doorbell
154 * delay\_ms - Specify the delay between receiving a doorbell
155 interrupt event and setting the peer doorbell register for the next
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/linux/drivers/gpu/drm/xe/
H A Dxe_guc_db_mgr.c22 * The GFX doorbell solution provides a mechanism for submission of workload
109 xe_gt_dbg(dbm_to_gt(dbm), "using %u doorbell%s\n", in xe_guc_db_mgr_init()
162 * xe_guc_db_mgr_reserve_id_locked() - Reserve a single GuC Doorbell ID.
167 * Return: ID of the allocated GuC doorbell or a negative error code on failure.
175 * xe_guc_db_mgr_release_id_locked() - Release a single GuC Doorbell ID.
177 * @id: the GuC Doorbell ID to release
187 * xe_guc_db_mgr_reserve_range() - Reserve a range of GuC Doorbell IDs.
189 * @count: number of GuC doorbell IDs to reserve
190 * @spare: number of GuC doorbell IDs to keep available
196 * Return: starting ID of the allocated GuC doorbell ID range or
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/linux/Documentation/PCI/endpoint/
H A Dpci-ntb-function.rst54 4) Doorbell (DB) Registers
113 CMD_CONFIGURE_DOORBELL (0x1): Command to configure doorbell. Before
117 the outbound ATU such that transactions to Doorbell BAR will be routed
154 Memory Window 1 and Doorbell registers are packed together in the
155 same BAR. The initial portion of the region will have doorbell
178 in order to raise doorbell. EPF NTB can use either MSI or MSI-X to
179 ring doorbell (MSI-X support will be added later). MSI uses same
192 will ensure there is no difference while raising the doorbell.
198 for raising doorbell interrupt. This will be populated by EPF NTB
213 Doorbell Registers:
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/linux/drivers/misc/vmw_vmci/
H A Dvmci_doorbell.c30 * DoorbellEntry describes the a doorbell notification handle allocated by the
80 * with a given doorbell handle. For guest endpoints, the
116 * Find doorbell entry by bitmap index.
225 * Creates a link between the given doorbell handle and the given
244 * Unlinks the given doorbell handle from an index in the bitmap in
273 * Dispatches a doorbell notification to the host context.
281 pr_devel("Notifying an invalid doorbell (handle=0x%x:0x%x)\n", in vmci_dbell_host_context_notify()
289 pr_devel("Notifying an unknown doorbell (handle=0x%x:0x%x)\n", in vmci_dbell_host_context_notify()
376 * vmci_doorbell_create() - Creates a doorbell
380 * @notify_cb: The callback to be ivoked when the doorbell fires.
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/linux/drivers/virt/
H A Dfsl_hypervisor.c19 * shutdown doorbell from a manager partition.
313 * Ring a doorbell
323 param.ret = ev_doorbell_send(param.doorbell); in ioctl_doorbell()
459 /* The size of the doorbell event queue. This must be a power of two. */
482 uint32_t doorbell; /* The doorbell handle */ member
487 * Add a doorbell to all of the doorbell queues
489 static void fsl_hv_queue_doorbell(uint32_t doorbell) in fsl_hv_queue_doorbell() argument
499 dbq->q[dbq->tail] = doorbell; in fsl_hv_queue_doorbell()
516 * We use the same interrupt handler for all doorbells. Whenever a doorbell
518 * doorbell (passed to us as *data) into all of the queues.
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/linux/drivers/scsi/esas2r/
H A Desas2r_int.c48 static void esas2r_doorbell_interrupt(struct esas2r_adapter *a, u32 doorbell);
59 u32 doorbell; in esas2r_polled_interrupt() local
76 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); in esas2r_polled_interrupt()
77 if (doorbell != 0) in esas2r_polled_interrupt()
78 esas2r_doorbell_interrupt(a, doorbell); in esas2r_polled_interrupt()
107 u32 doorbell; in esas2r_adapter_interrupt() local
118 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); in esas2r_adapter_interrupt()
119 if (doorbell != 0) in esas2r_adapter_interrupt()
120 esas2r_doorbell_interrupt(a, doorbell); in esas2r_adapter_interrupt()
135 u32 doorbell; in esas2r_msi_interrupt() local
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H A Desas2r_init.c939 u32 doorbell; in esas2r_check_adapter() local
965 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); in esas2r_check_adapter()
966 if (doorbell == 0xFFFFFFFF) { in esas2r_check_adapter()
974 } else if (doorbell & DRBL_FORCE_INT) { in esas2r_check_adapter()
975 u32 ver = (doorbell & DRBL_FW_VER_MSK); in esas2r_check_adapter()
982 doorbell); in esas2r_check_adapter()
1017 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); in esas2r_check_adapter()
1018 if (doorbell & DRBL_MSG_IFC_DOWN) { in esas2r_check_adapter()
1020 doorbell); in esas2r_check_adapter()
1106 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); in esas2r_check_adapter()
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/linux/drivers/pci/endpoint/functions/
H A Dpci-epf-ntb.c183 * | BAR0 | | | Doorbell 1 +-----------> MSI|X ADDRESS 1 |
185 * | BAR1 | | | Doorbell 2 +---------+ | |
187 * | BAR2 | | Doorbell 3 +-------+ | +-----------------+
189 * | BAR3 | | | Doorbell 4 +-----+ | +-----------------+
230 * Please note Memory window1 (MW1) and Doorbell registers together will be
326 * @db_count: Number of doorbell interrupts to map
329 *| BAR0 | | | Doorbell 1 +---+-------> MSI ADDRESS |
331 *| BAR1 | | | Doorbell 2 +---+ | |
333 *| BAR2 | | Doorbell 3 +---+ | |
335 *| BAR3 | | | Doorbell 4 +---+ | |
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/linux/arch/powerpc/include/asm/
H A Ddbell.h25 PPC_DBELL = 0, /* doorbell */
26 PPC_DBELL_CRIT = 1, /* critical doorbell */
27 PPC_G_DBELL = 2, /* guest doorbell */
28 PPC_G_DBELL_CRIT = 3, /* guest critical doorbell */
29 PPC_G_DBELL_MC = 4, /* guest mcheck doorbell */
30 PPC_DBELL_SERVER = 5, /* doorbell on server */
141 * Attempt to cause a core doorbell if destination is on the same core.
/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_pm.h9 /* Trigger the doorbell interrupt on cp to change the PM sleep/active status */
13 /* Trigger the doorbell interrupt on CP to do hpda update */
65 * and DOORBELL-IRQ-HPDA(data) values.
68 * @IPC_MEM_DEV_PM_WAKEUP: DOORBELL-IRQ-DEVICE_WAKE(data).
69 * @IPC_MEM_DEV_PM_HOST_SLEEP: DOORBELL-IRQ-HOST_SLEEP(data).
71 * @IPC_MEM_DEV_PM_FORCE_SLEEP: DOORBELL-IRQ-FORCE_SLEEP.
72 * @IPC_MEM_DEV_PM_FORCE_ACTIVE: DOORBELL-IRQ-FORCE_ACTIVE.
190 * update then only doorbell is triggered otherwise pending
H A Diosm_ipc_pcie.h23 /* Defines for DOORBELL registers information */
48 * @ipc_regs: Remapped CP doorbell address of the irq register
49 * set, to fire the doorbell irq.
55 * @ipc_regs_bar_nr: BAR number to be used for IPC doorbell
59 * @doorbell_write: doorbell write register
60 * @doorbell_capture: doorbell capture resgister
/linux/include/linux/mlx4/
H A Dcq.h40 #include <linux/mlx4/doorbell.h>
151 __be32 doorbell[2]; in mlx4_cq_arm() local
161 * Make sure that the doorbell record in host memory is in mlx4_cq_arm()
162 * written before ringing the doorbell via PCI MMIO. in mlx4_cq_arm()
166 doorbell[0] = cpu_to_be32(sn << 28 | cmd | cq->cqn); in mlx4_cq_arm()
167 doorbell[1] = cpu_to_be32(ci); in mlx4_cq_arm()
169 mlx4_write64(doorbell, uar_page + MLX4_CQ_DOORBELL, doorbell_lock); in mlx4_cq_arm()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_device.c328 * GPU doorbell aperture helpers function.
331 * radeon_doorbell_init - Init doorbell driver information.
335 * Init doorbell driver information (CIK)
340 /* doorbell bar mapping */ in radeon_doorbell_init()
341 rdev->doorbell.base = pci_resource_start(rdev->pdev, 2); in radeon_doorbell_init()
342 rdev->doorbell.size = pci_resource_len(rdev->pdev, 2); in radeon_doorbell_init()
344 rdev->doorbell.num_doorbells = min_t(u32, rdev->doorbell.size / sizeof(u32), RADEON_MAX_DOORBELLS); in radeon_doorbell_init()
345 if (rdev->doorbell.num_doorbells == 0) in radeon_doorbell_init()
348 rdev->doorbell.ptr = ioremap(rdev->doorbell.base, rdev->doorbell.num_doorbells * sizeof(u32)); in radeon_doorbell_init()
349 if (rdev->doorbell.ptr == NULL) { in radeon_doorbell_init()
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/linux/include/uapi/rdma/
H A Dqedr-abi.h141 /* address of SQ doorbell recovery user entry */
144 /* address of RQ doorbell recovery user entry */
166 /* doorbell recovery entry allocated and populated by userspace doorbelling
167 * entities and mapped to kernel. Kernel uses this to register doorbell
168 * information with doorbell drop recovery mechanism.
171 __aligned_u64 db_data; /* doorbell data */
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dsrio-rmu.txt23 and doorbell units.
33 (msg-unit, doorbell, port-write).
54 and doorbell units.
68 Doorbell Unit:
84 and doorbell units.
114 and doorbell units.
151 doorbell-unit@400 {
/linux/include/linux/mlx5/
H A Dcq.h156 __be32 doorbell[2]; in mlx5_cq_arm() local
165 /* Make sure that the doorbell record in host memory is in mlx5_cq_arm()
166 * written before ringing the doorbell via PCI MMIO. in mlx5_cq_arm()
170 doorbell[0] = cpu_to_be32(sn << 28 | cmd | ci); in mlx5_cq_arm()
171 doorbell[1] = cpu_to_be32(cq->cqn); in mlx5_cq_arm()
173 mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL); in mlx5_cq_arm()
/linux/include/uapi/linux/
H A Dfsl_hypervisor.h152 * struct fsl_hv_ioctl_doorbell - ring a doorbell
154 * @doorbell: the handle of the doorbell to ring doorbell
160 __u32 doorbell; member
208 /* Ring a doorbell */
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_values.h102 /* T5 and later support a new BAR2-based doorbell mechanism for Egress Queues.
103 * The User Doorbells are each 128 bytes in length with a Simple Doorbell at
108 * As noted above, we have many instances of the Simple Doorbell and Going To
110 * non-64-byte aligned offset for the Simple Doorbell in order to attempt to
111 * avoid buffering of the writes to the Simple Doorbell and we want to use a

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