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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra124-emc.yaml13 description: |
26 - description: external memory clock
37 description:
42 description:
46 description:
57 description:
66 description:
73 description:
79 description:
85 description:
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H A Dnvidia,tegra30-emc.yaml14 description: |
39 description:
44 description:
48 description:
58 description:
66 description:
72 description:
80 description:
85 description:
90 description:
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H A Dnvidia,tegra20-emc.yaml14 description: |
45 description:
50 description:
54 description:
60 description:
71 description:
78 description:
83 description:
89 - description: EMC_RC
90 - description: EMC_RFC
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H A Dti,gpmc-child.yaml13 description:
25 description: Minimum clock period for synchronous mode
30 description: Assertion time
34 description: Read deassertion time
38 description: Write deassertion time
43 description: Assertion time
47 description: Read deassertion time
51 description: Write deassertion time
55 description: Assertion time for AAD
59 description: Read deassertion time for AAD
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/linux/Documentation/devicetree/bindings/clock/
H A Dst,stm32mp25-rcc.yaml12 description: |
36 - description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz)
37 - description: CK_SCMI_HSI High Speed Internal oscillator (~ 64 MHz)
38 - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz)
39 - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
40 - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
41 - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (could be gated)
42 - description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock
43 - description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock
44 - description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock
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H A Dst,stm32mp21-rcc.yaml12 description: |
36 - description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz)
37 - description: CK_SCMI_HSI High Speed Internal oscillator (~ 64 MHz)
38 - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz)
39 - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
40 - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
41 - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (could be gated)
42 - description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock
43 - description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock
44 - description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock
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H A Dfsl,imx8-acm.yaml12 description: |
32 description:
64 - description: power domain of IMX_SC_R_AUDIO_CLK_0
65 - description: power domain of IMX_SC_R_AUDIO_CLK_1
66 - description: power domain of IMX_SC_R_MCLK_OUT_0
67 - description: power domain of IMX_SC_R_MCLK_OUT_1
68 - description: power domain of IMX_SC_R_AUDIO_PLL_0
69 - description: power domain of IMX_SC_R_AUDIO_PLL_1
70 - description: power domain of IMX_SC_R_ASRC_0
71 - description: power domain of IMX_SC_R_ASRC_1
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H A Dqcom,glymur-gcc.yaml12 description: |
24 - description: Board XO source
25 - description: Board XO_A source
26 - description: Sleep clock source
27 - description: USB 0 Phy DP0 GMUX clock source
28 - description: USB 0 Phy DP1 GMUX clock source
29 - description: USB 0 Phy PCIE PIPEGMUX clock source
30 - description: USB 0 Phy PIPEGMUX clock source
31 - description: USB 0 Phy SYS PCIE PIPEGMUX clock source
32 - description: USB 1 Phy DP0 GMUX 2 clock source
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H A Dsamsung,exynos8895-clock.yaml14 description: |
72 - description: External reference clock (26 MHz)
73 - description: CMU_FSYS0 BUS clock (from CMU_TOP)
74 - description: CMU_FSYS0 DPGTC clock (from CMU_TOP)
75 - description: CMU_FSYS0 MMC_EMBD clock (from CMU_TOP)
76 - description: CMU_FSYS0 UFS_EMBD clock (from CMU_TOP)
77 - description: CMU_FSYS0 USBDRD30 clock (from CMU_TOP)
98 - description: External reference clock (26 MHz)
99 - description: CMU_FSYS1 BUS clock (from CMU_TOP)
100 - description: CMU_FSYS1 PCIE clock (from CMU_TOP)
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H A Dsamsung,exynos850-clock.yaml16 description: |
73 - description: External reference clock (26 MHz)
89 - description: External reference clock (26 MHz)
90 - description: CMU_APM bus clock (from CMU_TOP)
107 - description: External reference clock (26 MHz)
108 - description: AUD clock (from CMU_TOP)
125 - description: External reference clock (26 MHz)
126 - description: CMU_CMGP bus clock (from CMU_APM)
143 - description: External reference clock (26 MHz)
144 - description: CMU_CORE bus clock (from CMU_TOP)
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/linux/Documentation/wmi/devices/
H A Dlenovo-wmi-gamezone.rst64 WMI interface description
67 The WMI interface description can be decoded from the embedded binary MOF (bmof)
72 …[WMI, Dynamic, Provider("WmiProv"), Locale("MS\\0x409"), Description("LENOVO_GAMEZONE_DATA class")…
77 …[WmiMethodId(4), Implemented, Description("Is SupportGpu OverClock")] void IsSupportGpuOC([out, De…
78 …[WmiMethodId(11), Implemented, Description("Get AslCode Version")] void GetVersion ([out, Descript…
79 …[WmiMethodId(12), Implemented, Description("Fan cooling capability")] void IsSupportFanCooling([ou…
80 …[WmiMethodId(13), Implemented, Description("Set Fan cooling on/off")] void SetFanCooling ([in, Des…
81 …[WmiMethodId(14), Implemented, Description("cpu oc capability")] void IsSupportCpuOC ([out, Descri…
82 …[WmiMethodId(15), Implemented, Description("bios has overclock capability")] void IsBIOSSupportOC …
83 …[WmiMethodId(16), Implemented, Description("enable or disable overclock in bios")] void SetBIOSOC …
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/linux/Documentation/devicetree/bindings/power/
H A Drockchip-io-domain.yaml12 description: |
97 description: The supply connected to VCCIO1.
99 description: The supply connected to VCCIO2.
101 description: The supply connected to VCCIO3.
103 description: The supply connected to VCCIO4.
105 description: The supply connected to VCCIO5.
107 description: The supply connected to VCCIO6.
109 description: The supply connected to VCCIO_OSCGPI.
121 description: The supply connected to PMUIO1.
123 description: The supply connected to PMUIO2.
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/linux/Documentation/devicetree/bindings/display/msm/
H A Dgmu.yaml14 description: |
49 - description: GMU HFI interrupt
50 - description: GMU interrupt
59 - description: CX power domain
60 - description: GX power domain
72 description: Reference to the AOSS side-channel message RAM
100 - description: Core GMU registers
101 - description: GMU PDC registers
102 - description: GMU PDC sequence registers
110 - description: GMU clock
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/linux/Documentation/devicetree/bindings/pwm/
H A Drenesas,rzg2l-gpt.yaml12 description: |
75 - description: GPT32E0.GTCCRA input capture/compare match
76 - description: GPT32E0.GTCCRB input capture/compare
77 - description: GPT32E0.GTCCRC compare match
78 - description: GPT32E0.GTCCRD compare match
79 - description: GPT32E0.GTCCRE compare match
80 - description: GPT32E0.GTCCRF compare match
81 - description: GPT32E0.GTADTRA compare match
82 - description: GPT32E0.GTADTRB compare match
83 - description: GPT32E0.GTCNT overflow/GTPR compare match
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/linux/Documentation/ABI/testing/
H A Dsysfs-class-hwmon2 Description:
13 Description:
21 Description:
31 Description:
39 Description:
51 Description:
59 Description:
71 Description:
93 Description:
101 Description:
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/linux/Documentation/devicetree/bindings/sound/
H A Dmediatek,mt2701-audio.yaml9 description:
23 - description: AFE interrupt
24 - description: ASYS interrupt
36 - description: audio infra sys clock
37 - description: top audio mux 1
38 - description: top audio mux 2
39 - description: top audio sys a1 clock
40 - description: top audio sys a2 clock
41 - description: i2s0 source selection
42 - description: i2s1 source selection
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sc7280-mss-pil.yaml12 description:
23 - description: MSS QDSP6 registers
24 - description: RMB registers
33 - description: MSA Stream 1
34 - description: MSA Stream 2
38 - description: Path leading to system memory
42 - description: Watchdog interrupt
43 - description: Fatal interrupt
44 - description: Ready interrupt
45 - description: Handover interrupt
[all …]
H A Dqcom,sc7180-mss-pil.yaml12 description:
23 - description: MSS QDSP6 registers
24 - description: RMB registers
33 - description: MSA Stream 1
34 - description: MSA Stream 2
38 - description: Watchdog interrupt
39 - description: Fatal interrupt
40 - description: Ready interrupt
41 - description: Handover interrupt
42 - description: Stop acknowledge interrupt
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-single.yaml12 description:
57 description:
63 description: Optional flag to indicate register controls more than one pin
67 description: Mask of the allowed register bits
71 description: Optional function off mode for disabled state
75 description: Width of pin specific bits in the register
80 description: Optional list of pin base, nr pins & gpio function
84 - description: phandle of a gpio-range node
85 - description: pin base
86 - description: number of pins
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H A Dnvidia,tegra-pinmux-common.yaml13 description: |
47 description: An array of strings. Each string contains the name of a pin
52 description: A string containing the name of the function to mux to the
57 description: Pull-down/up setting to apply to the pin.
60 - description: none
62 - description: down
64 - description: up
68 description: Tristate setting to apply to the pin.
71 - description: drive
73 - description: tristate
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Drenesas,rzg2l-irqc.yaml13 description: |
36 description: The first cell should contain a macro RZG2L_{NMI,IRQX} included in the
52 - description: NMI interrupt
53 - description: IRQ0 interrupt
54 - description: IRQ1 interrupt
55 - description: IRQ2 interrupt
56 - description: IRQ3 interrupt
57 - description: IRQ4 interrupt
58 - description: IRQ5 interrupt
59 - description: IRQ6 interrupt
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/linux/Documentation/devicetree/bindings/riscv/
H A Dextensions.yaml14 description: |
29 description:
49 description:
59 description: Extensions supported by the hart.
64 description: |
73 description:
79 description:
84 description:
90 description:
96 description:
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/linux/Documentation/devicetree/bindings/mfd/
H A Dstericsson,ab8500.yaml12 description:
50 description: Node describing the AB8500 clock controller. This
64 description: Node describing the AB8500 GPIO controller. A few
81 description: Node describing the AB8500 battery-backed RTC.
91 - description: 60 second interval alarm interrupt
92 - description: RTC alarm
100 description: Node describing the AB8500 general purpose analog to digital
130 description: Represents each of the external channels which are
156 description: Node describing the AB8500 thermal control block. All this block
167 - description: Thermal warm warning interrupt
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/linux/Documentation/devicetree/bindings/dma/
H A Dcirrus,ep9301-dma-m2p.yaml30 - description: m2p0 channel registers
31 - description: m2p1 channel registers
32 - description: m2p2 channel registers
33 - description: m2p3 channel registers
34 - description: m2p4 channel registers
35 - description: m2p5 channel registers
36 - description: m2p6 channel registers
37 - description: m2p7 channel registers
38 - description: m2p8 channel registers
39 - description: m2p9 channel registers
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/linux/Documentation/devicetree/bindings/usb/
H A Dsnps,dwc3-common.yaml12 description:
38 - description: USB2/HS PHY
39 - description: USB3/SS PHY
55 description: Indicate if we don't want to enable USB2 HW LPM for host
60 description: Determines if platform is USB3 LPM capable
64 description: Indicate if we don't want to enable USB2 HW LPM for gadget
69 description:
80 description:
86 description:
92 description: True when DWC3 was configured with LPM Erratum enabled
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