/linux/scripts/dtc/ |
H A D | livetree.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 19 if (streq(new->label, label)) { in add_label() 20 new->deleted = 0; in add_label() 26 new->label = label; in add_label() 27 new->next = *labels; in add_label() 36 label->deleted = 1; in delete_labels() 46 new->name = xstrdup(name); in build_property() 47 new->val = val; in build_property() 48 new->srcpos = srcpos_copy(srcpos); in build_property() 59 new->name = xstrdup(name); in build_property_delete() [all …]
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H A D | checks.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 12 fprintf(stderr, "=== %s: ", (c)->name); \ 29 typedef void (*check_fn)(struct check *c, struct dt_info *dti, struct node *node); 62 struct node *node, in check_msg() argument 71 if (!(c->warn && (quiet < 1)) && !(c->error && (quiet < 2))) in check_msg() 74 if (prop && prop->srcpos) in check_msg() 75 pos = prop->srcpos; in check_msg() 76 else if (node && node->srcpos) in check_msg() 77 pos = node->srcpos; in check_msg() 83 } else if (streq(dti->outname, "-")) { in check_msg() [all …]
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/linux/Documentation/devicetree/ |
H A D | usage-model.rst | 1 .. SPDX-License-Identifier: GPL-2.0 17 The "Open Firmware Device Tree", or simply Devicetree (DT), is a data 23 Structurally, the DT is a tree, or acyclic graph with named nodes, and 26 links from one node to another outside of the natural tree structure. 34 maximize use of existing support code, but since property and node 44 ---------- 45 The DT was originally created by Open Firmware as part of the 56 In 2005, when PowerPC Linux began a major cleanup and to merge 32-bit 57 and 64-bit support, the decision was made to require DT support on all 59 Firmware. To do this, a DT representation called the Flattened Device [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | maxim,max77686.txt | 4 multi-function device. More information can be found in MFD DT binding 12 dt-bindings/clock/maxim,max77686.h. 17 dt-bindings/clock/maxim,max77802.h. 21 dt-bindings/clock/maxim,max77620.h. 23 Following properties should be presend in main device node of the MFD chip. 27 - #clock-cells: from common clock binding; shall be set to 1. 30 - clock-output-names: From common clock binding. 34 - 0: 32khz_ap clock (max77686, max77802), 32khz_out0 (max77620) 35 - 1: 32khz_cp clock (max77686, max77802), 36 - 2: 32khz_pmic clock (max77686). [all …]
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/linux/Documentation/devicetree/bindings/power/ |
H A D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 18 Power domains contained within power-controller node are 20 Documentation/devicetree/bindings/power/power-domain.yaml. 23 "power-domains" property that is a phandle for the 24 power domain node representing the domain. [all …]
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H A D | fsl,imx-gpcv2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrey Smirnov <andrew.smirnov@gmail.com> 16 Power domains contained within GPC node are generic power domain 18 Documentation/devicetree/bindings/power/power-domain.yaml, which are 19 described as subnodes of the power gating controller 'pgc' node. 21 IP cores belonging to a power domain should contain a 'power-domains' 22 property that is a phandle for PGC node representing the domain. [all …]
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/linux/drivers/clocksource/ |
H A D | timer-digicolor.c | 1 // SPDX-License-Identifier: GPL-2.0 14 * Maxime Ripard <maxime.ripard@free-electrons.com> 71 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_disable() local 72 writeb(CONTROL_DISABLE, dt->base + CONTROL(dt->timer_id)); in dc_timer_disable() 77 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_enable() local 78 writeb(CONTROL_ENABLE | mode, dt->base + CONTROL(dt->timer_id)); in dc_timer_enable() 84 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_set_count() local 85 writel(count, dt->base + COUNT(dt->timer_id)); in dc_timer_set_count() 103 struct digicolor_timer *dt = dc_timer(ce); in digicolor_clkevt_set_periodic() local 106 dc_timer_set_count(ce, dt->ticks_per_jiffy); in digicolor_clkevt_set_periodic() [all …]
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/linux/Documentation/devicetree/bindings/firmware/ |
H A D | nvidia,tegra186-bpmp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 This node is a mailbox consumer. See the following files for details 25 - .../mailbox/mailbox.txt 26 - .../mailbox/nvidia,tegra186-hsp.yaml 28 This node is a clock, power domain, and reset provider. See the [all …]
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/linux/arch/mips/generic/ |
H A D | board-sead3.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 17 #include <asm/yamon-dt.h> 56 /* leave the GIC node intact if a GIC is present */ in remove_gic() 61 gic_off = fdt_node_offset_by_compatible(fdt, -1, "mti,gic"); in remove_gic() 63 pr_err("unable to find DT GIC node: %d\n", gic_off); in remove_gic() 69 pr_err("unable to nop GIC node\n"); in remove_gic() 73 cpu_off = fdt_node_offset_by_compatible(fdt, -1, in remove_gic() 74 "mti,cpu-interrupt-controller"); in remove_gic() 76 pr_err("unable to find CPU intc node: %d\n", cpu_off); in remove_gic() 83 return -EINVAL; in remove_gic() [all …]
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H A D | yamon-dt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 7 #define pr_fmt(fmt) "yamon-dt: " fmt 16 #include <asm/yamon-dt.h> 24 /* find or add chosen node */ in yamon_dt_append_cmdline() 26 if (chosen_off == -FDT_ERR_NOTFOUND) in yamon_dt_append_cmdline() 29 pr_err("Unable to find or add DT chosen node: %d\n", in yamon_dt_append_cmdline() 53 for (mr = regions; mr->size && memsize; ++mr) { in gen_fdt_mem_array() 61 size = min_t(unsigned long, memsize, mr->size); in gen_fdt_mem_array() 62 memsize -= size; in gen_fdt_mem_array() 65 *(mem_array++) = cpu_to_be32(mr->start); in gen_fdt_mem_array() [all …]
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/linux/arch/mips/mti-malta/ |
H A D | malta-dtshim.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 15 #include <asm/mips-boards/generic.h> 16 #include <asm/mips-boards/malta.h> 17 #include <asm/mips-cps.h> 91 size -= size_preio; in gen_fdt_mem_array() 99 * obscures 256MB from 0x10000000-0x1fffffff. in gen_fdt_mem_array() 105 size -= SZ_256M; in gen_fdt_mem_array() 115 * obscures 256MB from 0x10000000-0x1fffffff in the low alias in gen_fdt_mem_array() 143 /* if a memory node already exists, leave it alone */ in append_memory() 169 * SOC-it swaps, or perhaps doesn't swap, when DMA'ing in append_memory() [all …]
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/linux/Documentation/devicetree/bindings/thermal/ |
H A D | thermal-zones.yaml | 1 # SPDX-License-Identifier: (GPL-2.0) 4 --- 5 $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml# 6 $schema: http://devicetree.org/meta-schemas/base.yaml# 11 - Daniel Lezcano <daniel.lezcano@linaro.org> 18 The following node types are used to completely describe a thermal management 20 - thermal-sensor: device that measures temperature, has SoC-specific bindings 21 - cooling-device: device used to dissipate heat either passively or actively 22 - thermal-zones: a container of the following node types used to describe all 25 This binding describes the thermal-zones. [all …]
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/linux/Documentation/devicetree/bindings/media/ |
H A D | renesas,vin.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car Video Input (VIN) 11 - Niklas Söderlund <niklas.soderlund@ragnatech.se> 14 The R-Car Video Input (VIN) device provides video input capabilities for the 15 Renesas R-Car family of devices. 20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver. 25 - items: 26 - enum: [all …]
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H A D | mediatek,mt8195-jpegenc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegenc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com> 17 const: mediatek,mt8195-jpgenc 19 power-domains: 29 "#address-cells": 32 "#size-cells": 37 # Required child node: [all …]
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H A D | mediatek,mt8195-jpegdec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegdec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com> 17 const: mediatek,mt8195-jpgdec 19 power-domains: 29 "#address-cells": 32 "#size-cells": 37 # Required child node: [all …]
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/linux/drivers/soc/qcom/ |
H A D | ice.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2013-2019, The Linux Foundation. All rights reserved. 31 /* BIST ("built-in self-test") status flags */ 39 writel((val), (engine)->base + (reg)) 42 readl((engine)->base + (reg)) 54 struct device *dev = ice->dev; in qcom_ice_check_supported() 106 * Wait until the ICE BIST (built-in self-test) has completed. 115 * and not relying on hardware-level self-tests. 122 err = readl_poll_timeout(ice->base + QCOM_ICE_REG_BIST_STATUS, in qcom_ice_wait_bist_status() 126 dev_err(ice->dev, "Timed out waiting for ICE self-test to complete\n"); in qcom_ice_wait_bist_status() [all …]
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/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,gsbi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 15 The GSBI controller is modeled as a node with zero or more child nodes, each 16 representing a serial sub-node device that is mux'd as part of the GSBI 20 A GSBI controller node can contain 0 or more child nodes representing serial 26 const: qcom,gsbi-v1.0.0 [all …]
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/linux/drivers/dma/ |
H A D | of-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 24 * of_dma_find_controller - Get a DMA controller in DT DMA helpers list 27 * Finds a DMA controller with matching device node and number for dma cells 37 if (ofdma->of_node == dma_spec->np) in of_dma_find_controller() 41 dma_spec->np); in of_dma_find_controller() 47 * of_dma_router_xlate - translation function for router devices 65 route_data = ofdma->of_dma_route_allocate(&dma_spec_target, ofdma); in of_dma_router_xlate() 71 ofdma->dma_router->route_free(ofdma->dma_router->dev, in of_dma_router_xlate() 73 chan = ERR_PTR(-EPROBE_DEFER); in of_dma_router_xlate() [all …]
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | ti-pci.txt | 4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated) 5 Should be "ti,dra7-pcie-ep" for EP (deprecated) 6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode 7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode 8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode 9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode 10 - phys : list of PHY specifiers (used by generic PHY framework) 11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the 13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>", 15 - num-lanes as specified in ../snps,dw-pcie.yaml [all …]
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/linux/drivers/irqchip/ |
H A D | irq-riscv-intc.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (C) 2017-2018 SiFive 8 #define pr_fmt(fmt) "riscv-intc: " fmt 31 unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG; in riscv_intc_irq() 46 * On RISC-V systems local interrupts are masked or unmasked by writing 54 if (IS_ENABLED(CONFIG_32BIT) && d->hwirq >= BITS_PER_LONG) in riscv_intc_irq_mask() 55 csr_clear(CSR_IEH, BIT(d->hwirq - BITS_PER_LONG)); in riscv_intc_irq_mask() 57 csr_clear(CSR_IE, BIT(d->hwirq)); in riscv_intc_irq_mask() 62 if (IS_ENABLED(CONFIG_32BIT) && d->hwirq >= BITS_PER_LONG) in riscv_intc_irq_unmask() 63 csr_set(CSR_IEH, BIT(d->hwirq - BITS_PER_LONG)); in riscv_intc_irq_unmask() [all …]
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/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | nwl-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs 10 - Guido Gúnther <agx@sigxcpu.org> 11 - Robert Chiras <robert.chiras@nxp.com> 14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for 15 the SOCs NWL MIPI-DSI host controller. 18 - $ref: ../dsi-controller.yaml# [all …]
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/linux/Documentation/devicetree/bindings/arm/ |
H A D | arm,coresight-cti.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 --- 5 $id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 37 indicate this feature (arm,coresight-cti-v8-arch). 52 constants defined in <dt-bindings/arm/coresight-cti-dt.h> 59 Note that some hardware trigger signals can be connected to non-CoreSight 63 - Mike Leach <mike.leach@linaro.org> 66 - $ref: /schemas/arm/primecell.yaml# 74 - arm,coresight-cti [all …]
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/linux/Documentation/devicetree/bindings/mfd/ |
H A D | as3722.txt | 4 ------------------- 5 - compatible: Must be "ams,as3722". 6 - reg: I2C device address. 7 - interrupt-controller: AS3722 has internal interrupt controller which takes the 8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well 10 - #interrupt-cells: Should be set to 2 for IRQ number and flags. 12 of AS3722 are defined at dt-bindings/mfd/as3722.h 14 interrupts.txt, using dt-bindings/irq. 17 -------------------- 18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on [all …]
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/linux/Documentation/devicetree/bindings/display/rockchip/ |
H A D | rockchip,inno-hdmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,inno-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 16 - rockchip,rk3036-inno-hdmi 17 - rockchip,rk3128-inno-hdmi 28 - description: The HDMI controller main clock 29 - description: The HDMI PHY reference clock [all …]
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/linux/Documentation/devicetree/bindings/soc/samsung/ |
H A D | exynos-usi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sam Protsenko <semen.protsenko@linaro.org> 11 - Krzysztof Kozlowski <krzk@kernel.org> 14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C). 16 protocol can be chosen at a time. USI is modeled as a node with zero or more 17 child nodes, each representing a serial sub-node device. The mode setting 22 pattern: "^usi@[0-9a-f]+$" [all …]
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