| /freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
| H A D | dsi-controller-main.yaml | 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
7 title: Qualcomm Display DSI controller
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
20 - qcom,msm8953-dsi-ctrl
21 - qcom,msm8974-dsi-ctrl
22 - qcom,msm8976-dsi-ctrl
23 - qcom,msm8996-dsi-ctrl
24 - qcom,msm8998-dsi-ctrl
[all …]
|
| H A D | dsi.txt | 1 Qualcomm Technologies Inc. adreno/snapdragon DSI output
3 DSI Controller:
6 * "qcom,mdss-dsi-ctrl"
10 - interrupts: The interrupt signal from the DSI block.
27 by a DSI PHY block. See [1] for details on clock bindings.
31 - phys: phandle to DSI PHY device node
34 - ports: Contains 2 DSI controller ports as child nodes. Each port contains
38 - panel@0: Node of panel connected to this DSI controller.
40 - qcom,dual-dsi-mode: Boolean value indicating if the DSI controller is
41 driving a panel which needs 2 DSI links.
[all …]
|
| H A D | dsi-phy-7nm.yaml | 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml#
7 title: Qualcomm Display DSI 7nm PHY
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-7nm
19 - qcom,dsi-phy-7nm-8150
20 - qcom,sc7280-dsi-phy-7nm
21 - qcom,sm6375-dsi-phy-7nm
22 - qcom,sm8350-dsi-phy-5nm
23 - qcom,sm8450-dsi-phy-5nm
24 - qcom,sm8550-dsi
[all...] |
| H A D | dsi-phy-28nm.yaml | 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-28nm.yaml#
7 title: Qualcomm Display DSI 28nm PHY
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-28nm-8226
19 - qcom,dsi-phy-28nm-8937
20 - qcom,dsi-phy-28nm-8960
21 - qcom,dsi-phy-28nm-hpm
22 - qcom,dsi-phy-28nm-hpm-fam-b
23 - qcom,dsi-phy-28nm-lp
27 - description: dsi pll register set
[all …]
|
| H A D | dsi-phy-14nm.yaml | 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
7 title: Qualcomm Display DSI 14nm PHY
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-14nm
19 - qcom,dsi-phy-14nm-2290
20 - qcom,dsi-phy-14nm-660
21 - qcom,dsi-phy-14nm-8953
22 - qcom,sm6125-dsi-phy-14nm
26 - description: dsi phy register set
27 - description: dsi ph
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | qcom,mmcc.yaml | 85 - description: DSI phy instance 1 dsi clock
86 - description: DSI phy instance 1 byte clock
87 - description: DSI phy instance 2 dsi clock
88 - description: DSI phy instance 2 byte clock
117 - description: DSI phy instance 0 dsi clock
118 - description: DSI phy instance 0 byte clock
145 - description: DSI ph
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | mipi-dsi-bus.txt | 1 MIPI DSI (Display Serial Interface) busses
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
15 The following assumes that only a single peripheral is connected to a DSI
18 DSI host
22 a DSI host, the following properties apply to a node representing a DSI host.
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
34 conjunction with another DSI host to drive the same peripheral. Hardware
[all …]
|
| H A D | allwinner,sun6i-a31-mipi-dsi.yaml | 4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml#
7 title: Allwinner A31 MIPI-DSI Controller
17 - allwinner,sun6i-a31-mipi-dsi
18 - allwinner,sun50i-a64-mipi-dsi
19 - allwinner,sun50i-a100-mipi-dsi
21 - const: allwinner,sun20i-d1-mipi-dsi
22 - const: allwinner,sun50i-a100-mipi-dsi
44 vcc-dsi-supply:
45 description: VCC-DSI power supply of the DSI encoder
70 - $ref: dsi-controller.yaml#
[all …]
|
| H A D | ste,mcde.txt | 4 and displaying several channels memory resident graphics data on DSI or
24 - #address-cells: should be <1> (for the DSI hosts that will be children)
25 - #size-cells: should be <1> (for the DSI hosts that will be children)
30 The devicetree must specify subnodes for the DSI host adapters.
34 "ste,mcde-dsi"
35 - reg: must specify the register range for the DSI host
45 Display panels and bridges will appear as children on the DSI hosts, and
46 the displays are connected to the DSI hosts using the common binding
50 If a DSI host is unused (not connected) it will have no children defined.
68 dsi0: dsi@a0351000 {
[all …]
|
| H A D | dsi-controller.yaml | 4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
7 title: Common Properties for DSI Display Panels
13 This document defines device tree properties common to DSI, Display
22 Notice: this binding concerns DSI panels connected directly to a master
23 without any intermediate port graph to the panel. Each DSI master
31 pattern: "^dsi(@.*)?$"
37 another DSI host to drive the same peripheral. Hardware supporting
39 to be driven by the same clock. Only the DSI host instance
50 description: Panels connected to the DSI link
58 The virtual channel number of a DSI peripheral. Must be in the range
[all …]
|
| H A D | st,stm32-dsi.yaml | 4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
7 title: STMicroelectronics STM32 DSI host controller
14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
17 - $ref: dsi-controller.yaml#
21 const: st,stm32-dsi
29 - description: DSI bus clock
47 phy-dsi-supply:
58 DSI input port node, connected to the ltdc rgb output port.
64 DSI output port node, connected to a panel or a bridge input port.
91 dsi: dsi@5a000000 {
[all …]
|
| H A D | brcm,bcm2835-dsi0.yaml | 7 title: Broadcom VC4 (VideoCore4) DSI Controller
13 - $ref: dsi-controller.yaml#
30 - description: The DSI PLL clock feeding the DSI analog PHY
31 - description: The DSI ESC clock
32 - description: The DSI pixel clock
43 # - description: The DSI byte clock for the PHY
44 # - description: The DSI DDR2 clock
45 # - description: The DSI DDR clock
68 dsi1: dsi@7e700000 {
|
| H A D | truly,nt35597.txt | 1 Truly model NT35597 DSI display driver
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
23 - port@0: DSI input port driven by master DSI
24 - port@1: DSI input port driven by secondary DSI
28 dsi@ae94000 {
|
| /freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
| H A D | nvidia,tegra20-dsi.yaml | 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
19 - nvidia,tegra114-dsi
20 - nvidia,tegra124-dsi
21 - nvidia,tegra210-dsi
22 - nvidia,tegra186-dsi
25 - const: nvidia,tegra132-dsi
26 - const: nvidia,tegra124-dsi
48 - const: dsi
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/display/mediatek/ |
| H A D | mediatek,dsi.yaml | 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml#
7 title: MediaTek DSI Controller
15 The MediaTek DSI function block is a sink of the display subsystem and can
16 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
20 - $ref: /schemas/display/dsi-controller.yaml#
26 - mediatek,mt2701-dsi
27 - mediatek,mt7623-dsi
28 - mediatek,mt8167-dsi
29 - mediatek,mt8173-dsi
30 - mediatek,mt8183-dsi
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | renesas,dsi.yaml | 4 $id: http://devicetree.org/schemas/display/bridge/renesas,dsi.yaml#
7 title: Renesas RZ/G2L MIPI DSI Encoder
13 This binding describes the MIPI DSI encoder embedded in the Renesas
14 RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with
18 - $ref: /schemas/display/dsi-controller.yaml#
24 - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
25 - renesas,r9a07g054-mipi-dsi # RZ/V2L
26 - const: renesas,rzg2l-mipi-dsi
36 - description: DSI Packet Receive interrupt
37 - description: DSI Fatal Error interrupt
[all …]
|
| H A D | cdns,dsi.txt | 1 Cadence DSI bridge
4 The Cadence DSI bridge is a DPI to DSI bridge supporting up to 4 DSI lanes.
7 - compatible: should be set to "cdns,dsi".
9 - interrupts: interrupt line connected to the DSI bridge.
10 - clocks: DSI bridge clocks.
18 - resets: DSI reset lines.
24 * port 0: this port is only needed if some of your DSI devices are
27 DSI virtual channel used by this device.
31 - one subnode per DSI device connected on the DSI bus. Each DSI device should
35 dsi0: dsi@fd0c0000 {
[all …]
|
| H A D | cdns,dsi.yaml | 4 $id: http://devicetree.org/schemas/display/bridge/cdns,dsi.yaml#
7 title: Cadence DSI bridge
13 CDNS DSI is a bridge device which converts DPI to DSI
18 - cdns,dsi
19 - ti,j721e-dsi
61 Output port representing the DSI output. It can have
63 the DSI virtual channel used by this device.
74 - $ref: ../dsi-controller.yaml#
80 const: ti,j721e-dsi
111 dsi@fd0c0000 {
[all …]
|
| H A D | renesas,dsi-csi2-tx.yaml | 4 $id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml#
7 title: Renesas R-Car MIPI DSI/CSI-2 Encoder
13 This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas
14 R-Car Gen4 SoCs. The encoder can operate in either DSI or CSI-2 mode, with up
20 - renesas,r8a779a0-dsi-csi2-tx # for V3U
21 - renesas,r8a779g0-dsi-csi2-tx # for V4H
29 - description: DSI (and CSI-2) functional clock
35 - const: dsi
55 description: DSI/CSI-2 output port
89 dsi0: dsi-encoder@fed80000 {
[all …]
|
| H A D | nwl-dsi.yaml | 4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
22 const: fsl,imx8mq-nwl-dsi
42 - description: DSI core clock
74 - description: dsi byte reset line
75 - description: dsi dpi reset line
76 - description: dsi esc reset line
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/display/rockchip/ |
| H A D | rockchip,dw-mipi-dsi.yaml | 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml#
7 title: Rockchip specific extensions to the Synopsys Designware MIPI DSI
17 - rockchip,px30-mipi-dsi
18 - rockchip,rk3128-mipi-dsi
19 - rockchip,rk3288-mipi-dsi
20 - rockchip,rk3399-mipi-dsi
21 - rockchip,rk3568-mipi-dsi
22 - rockchip,rv1126-mipi-dsi
23 - const: snps,dw-mipi-dsi
74 - $ref: /schemas/display/bridge/snps,dw-mipi-dsi.yaml#
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/display/panel/ |
| H A D | sharp,lq101r1sx01.txt | 3 This panel requires a dual-channel DSI host to operate. It supports two modes:
7 Each of the DSI channels controls a separate DSI peripheral. The peripheral
8 driven by the first link (DSI-LINK1), left or even, is considered the primary
10 to the peripheral driven by the second link (DSI-LINK2, right or odd).
12 Note that in video mode the DSI-LINK1 interface always provides the left/even
13 pixels and DSI-LINK2 always provides the right/odd pixels. In command mode it
20 - reg: DSI virtual channel of the peripheral
22 Required properties (for DSI-LINK1 only):
23 - link2: phandle to the DSI peripheral on the secondary link. Note that the
24 presence of this property marks the containing node as DSI-LINK1.
[all …]
|
| H A D | sharp,lq101r1sx01.yaml | 13 This panel requires a dual-channel DSI host to operate. It supports two modes:
17 Each of the DSI channels controls a separate DSI peripheral. The peripheral
18 driven by the first link (DSI-LINK1), left or even, is considered the primary
20 to the peripheral driven by the second link (DSI-LINK2, right or odd).
22 Note that in video mode the DSI-LINK1 interface always provides the left/even
23 pixels and DSI-LINK2 always provides the right/odd pixels. In command mode it
49 phandle to the DSI peripheral on the secondary link. Note that the
50 presence of this property marks the containing node as DSI-LINK1
67 dsi0: dsi@fd922800 {
83 dsi1: dsi@fd922a00 {
|
| /freebsd/sys/contrib/device-tree/Bindings/display/exynos/ |
| H A D | exynos_dsim.txt | 1 Exynos MIPI DSI Master
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
11 - interrupts: should contain DSI interrupt
23 according to DSI host bindings (see MIPI DSI bindings [1])
24 - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst
26 - samsung,esc-clock-frequency: specifies DSI frequency in escape mode
[all …]
|
| /freebsd/sys/compat/linuxkpi/common/src/ |
| H A D | linux_dmi.c | 76 linux_dmi_matches(const struct dmi_system_id *dsi) in linux_dmi_matches() argument
81 for (i = 0; i < nitems(dsi->matches); i++) { in linux_dmi_matches()
82 slot = dsi->matches[i].slot; in linux_dmi_matches()
88 if (dsi->matches[i].exact_match) { in linux_dmi_matches()
89 if (dmi_match(slot, dsi->matches[i].substr)) in linux_dmi_matches()
92 dsi->matches[i].substr) != NULL) { in linux_dmi_matches()
117 const struct dmi_system_id *dsi; in linux_dmi_first_match() local
119 for (dsi = list; dsi->matches[0].slot != 0; dsi++) { in linux_dmi_first_match()
120 if (linux_dmi_matches(dsi)) in linux_dmi_first_match()
121 return (dsi); in linux_dmi_first_match()
[all …]
|