| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | transmit-amplitude.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 Binding describing the peak-to-peak transmit amplitude for common PHYs 14 - Marek Behún <kabel@kernel.org> 17 tx-p2p-microvolt: 19 Transmit amplitude voltages in microvolts, peak-to-peak. If this property 21 'tx-p2p-microvolt-names' property must be provided and contain 24 tx-p2p-microvolt-names: [all …]
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| H A D | phy-rockchip-usbdp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/phy-rockchip-usbdp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Wang <frank.wang@rock-chips.com> 11 - Zhang Yubing <yubing.zhang@rock-chips.com> 16 - rockchip,rk3576-usbdp-phy 17 - rockchip,rk3588-usbdp-phy 22 "#phy-cells": 25 - PHY_TYPE_USB3 [all …]
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| H A D | qcom,sc7180-qmp-usb3-dp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Qualcomm QMP USB3 DP PHY controller (SC7180) 12 controllers on Qualcomm chipsets, such as, PCIe, UFS and USB. 15 qcom,sc8280xp-qmp-usb43dp-phy.yaml. 18 - Wesley Cheng <quic_wcheng@quicinc.com> 23 - enum: 24 - qcom,sc7180-qmp-usb3-dp-phy [all …]
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| H A D | qcom,sc8280xp-qmp-usb43dp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP) 10 - Vinod Koul <vkoul@kernel.org> 14 controllers on Qualcomm chipsets, such as, PCIe, UFS and USB. 19 - qcom,sar2130p-qmp-usb3-dp-phy 20 - qcom,sc7180-qmp-usb3-dp-phy 21 - qcom,sc7280-qmp-usb3-dp-phy [all …]
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| H A D | qcom,qmp-usb3-dp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-usb3-dp-phy.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 8 title: Qualcomm QMP USB3 DP PHY controller 11 - Wesley Cheng <quic_wcheng@quicinc.com> 16 - qcom,sc7180-qmp-usb3-dp-phy 17 - qcom,sc7280-qmp-usb3-dp-phy 18 - qcom,sc8180x-qmp-usb3-dp-phy 19 - qcom,sc8280xp-qmp-usb43dp-phy [all …]
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| H A D | motorola,cpcap-usb-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/motorola,cpcap-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Motorola CPCAP PMIC USB PHY 10 - Tony Lindgren <tony@atomide.com> 15 - motorola,cpcap-usb-phy 16 - motorola,mapphone-cpcap-usb-phy 18 '#phy-cells': 22 description: CPCAP PMIC interrupts used by the USB PHY [all …]
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| H A D | qcom,usb-snps-femto-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2 10 - Wesley Cheng <quic_wcheng@quicinc.com> 13 Qualcomm High-Speed USB PHY 18 - items: 19 - enum: 20 - qcom,sa8775p-usb-hs-phy [all …]
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| H A D | rockchip,rk3399-typec-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,rk3399-typec-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Type-C PHY 10 - Heiko Stuebner <heiko@sntech.de> 14 const: rockchip,rk3399-typec-phy 22 clock-names: 24 - const: tcpdcore 25 - const: tcpdphy-ref [all …]
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| H A D | samsung,usb3-drd-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC USB 3.0 DRD PHY USB 2.0 PHY 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Marek Szyprowski <m.szyprowski@samsung.com> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 15 For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy 18 0 - UTMI+ type phy, [all …]
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| H A D | mxs-usb-phy.txt | 1 * Freescale MXS USB Phy Device 4 - compatible: should contain: 5 * "fsl,imx23-usbphy" for imx23 and imx28 6 * "fsl,imx6q-usbphy" for imx6dq and imx6dl 7 * "fsl,imx6sl-usbphy" for imx6sl 8 * "fsl,vf610-usbphy" for Vybrid vf610 9 * "fsl,imx6sx-usbphy" for imx6sx 10 * "fsl,imx7ulp-usbphy" for imx7ulp 11 * "fsl,imx8dxl-usbphy" for imx8dxl 12 "fsl,imx23-usbphy" is still a fallback for other strings [all …]
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| H A D | fsl,mxs-usbphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/fsl,mxs-usbphy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale MXS USB Phy Device 10 - Xu Yang <xu.yang_2@nxp.com> 15 - enum: 16 - fsl,imx23-usbphy 17 - fsl,imx7ulp-usbphy 18 - fsl,vf610-usbphy [all …]
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| H A D | phy-cpcap-usb.txt | 1 Motorola CPCAP PMIC USB PHY binding 4 compatible: Shall be either "motorola,cpcap-usb-phy" or 5 "motorola,mapphone-cpcap-usb-phy" 6 #phy-cells: Shall be 0 7 interrupts: CPCAP PMIC interrupts used by the USB PHY 8 interrupt-names: Interrupt names 9 io-channels: IIO ADC channels used by the USB PHY 10 io-channel-names: IIO ADC channel names 11 vusb-supply: Regulator for the PHY 15 pinctrl-names: Names for optional pin modes [all …]
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| H A D | phy-rockchip-typec.txt | 1 * ROCKCHIP type-c PHY 2 --------------------- 5 - compatible : must be "rockchip,rk3399-typec-phy" 6 - reg: Address and length of the usb phy control register set 7 - rockchip,grf : phandle to the syscon managing the "general 9 - clocks : phandle + clock specifier for the phy clocks 10 - clock-names : string, clock name, must be "tcpdcore", "tcpdphy-ref"; 11 - assigned-clocks: main clock, should be <&cru SCLK_UPHY0_TCPDCORE> or 13 - assigned-clock-rates : the phy core clk frequency, shall be: 50000000 14 - resets : a list of phandle + reset specifier pairs [all …]
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| /freebsd/sys/dev/rtwn/usb/ |
| H A D | rtwn_usb_attach.c | 3 /*- 6 * Copyright (c) 2015-2016 Andriy Voskoboinyk <avos@FreeBSD.org> 43 #include <dev/usb/usb.h> 44 #include <dev/usb/usbdi.h> 50 #include <dev/rtwn/usb/rtwn_usb_var.h> 52 #include <dev/rtwn/usb/rtwn_usb_attach.h> 53 #include <dev/rtwn/usb/rtwn_usb_ep.h> 54 #include <dev/rtwn/usb/rtwn_usb_reg.h> 55 #include <dev/rtwn/usb/rtwn_usb_tx.h> 93 if (uaa->usb_mode != USB_MODE_HOST) in rtwn_usb_match() [all …]
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| /freebsd/stand/efi/libefi/ |
| H A D | efipart.c | 1 /*- 124 if (dev->dv_type == DEVT_DISK) in efiblk_get_pdinfo_list() 126 if (dev->dv_type == DEVT_CD) in efiblk_get_pdinfo_list() 128 if (dev->dv_type == DEVT_FD) in efiblk_get_pdinfo_list() 140 pdi = efiblk_get_pdinfo_list(dev->d_dev); in efiblk_get_pdinfo() 145 if (pd->pd_unit == dev->d_unit) in efiblk_get_pdinfo() 158 status = BS->LocateDevicePath(&blkio_guid, &devp, &h); in efiblk_get_pdinfo_by_device_path() 168 return (pd->pd_handle == h || pd->pd_alias == h); in same_handle() 174 pdinfo_t *dp, *pp; in efiblk_get_pdinfo_by_handle() local 179 STAILQ_FOREACH(dp, &hdinfo, pd_link) { in efiblk_get_pdinfo_by_handle() [all …]
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| /freebsd/lib/libusb/ |
| H A D | libusb01.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 46 #include "usb.h" 55 ent->next = begin; \ 56 ent->next->prev = ent; \ 58 ent->next = NULL; \ 60 ent->prev = NULL; \ 66 if (ent->prev) { \ 67 ent->prev->next = ent->next; \ 69 begin = ent->next; \ [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | exynos5260-clock.txt | 4 independently from the device-tree. These clock controllers 11 dt-bindings/clock/exynos5260-clk.h header and can be used in 18 with following clock-output-names: 20 - "fin_pll" - PLL input clock from XXTI 21 - "xrtcxti" - input clock from XRTCXTI 22 - "ioclk_pcm_extclk" - pcm external operation clock 23 - "ioclk_spdif_extclk" - spdif external operation clock 24 - "ioclk_i2s_cdclk" - i2s0 codec clock 33 - "phyclk_dptx_phy_ch3_txd_clk" - dp phy clock for channel 3 34 - "phyclk_dptx_phy_ch2_txd_clk" - dp phy clock for channel 2 [all …]
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| H A D | qcom,gcc-sc8280xp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc8280xp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 16 See also: include/dt-bindings/clock/qcom,gcc-sc8280xp.h 20 const: qcom,gcc-sc8280xp 24 - description: XO reference clock 25 - description: Sleep clock 26 - description: UFS memory first RX symbol clock [all …]
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| H A D | samsung,exynos5260-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/samsung,exynos5260-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 - Tomasz Figa <tomasz.figa@gmail.com> 16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching 18 - "fin_pll" - PLL input clock from XXTI [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | qcom,dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Legacy Qualcomm SuperSpeed DWC3 USB SoC controller 10 - Wesley Cheng <quic_wcheng@quicinc.com> 12 # Use the combined qcom,snps-dwc3 instead 21 - compatible 26 - enum: 27 - qcom,ipq4019-dwc3 [all …]
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| H A D | qcom,snps-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SuperSpeed DWC3 USB SoC controller 10 - Wesley Cheng <quic_wcheng@quicinc.com> 13 Describes the Qualcomm USB block, based on Synopsys DWC3. 19 const: qcom,snps-dwc3 21 - compatible 26 - enum: [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/rockchip/ |
| H A D | rockchip,rk3399-cdn-dp.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3399-cdn-dp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Yan <andy.yan@rock-chip.com> 11 - Heiko Stuebner <heiko@sntech.de> 12 - Sandy Huang <hjc@rock-chips.com> 15 - $ref: /schemas/sound/dai-common.yaml# 20 - const: rockchip,rk3399-cdn-dp 27 - description: DP core work clock [all …]
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| /freebsd/sys/cam/scsi/ |
| H A D | scsi_da.c | 1 /*- 4 * SPDX-License-Identifier: BSD-2-Clause 84 * ATA -> LOGDIR -> IDDIR -> SUP -> ATA_ZONE 402 softc->delete_available |= (1 << delete_method); \ 404 softc->delete_available &= ~(1 << delete_method); \ 497 * 6-byte CDB. 539 /* USB mass storage devices supported by umass(4) */ 542 * EXATELECOM (Sigmatel) i-Bead 100/105 USB Flash MP3 Player 545 {T_DIRECT, SIP_MEDIA_REMOVABLE, "EXATEL", "i-BEAD10*", "*"}, 550 * Power Quotient Int. (PQI) USB flash key [all …]
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| /freebsd/sys/dev/usb/net/ |
| H A D | if_cdce.c | 3 /*- 4 * SPDX-License-Identifier: BSD-4-Clause 6 * Copyright (c) 1997, 1998, 1999, 2000-2003 Bill Paul <wpaul@windriver.com> 7 * Copyright (c) 2003-2005 Craig Boston 23 * 4. Neither the name of the author nor the names of any co-contributors 41 * USB Communication Device Class (Ethernet Networking Control Model) 42 * http://www.usb.org/developers/devclass_docs/usbcdc11.pdf 46 * USB Network Control Model (NCM) 47 * http://www.usb.org/developers/devclass_docs/NCM10.zip 73 #include <dev/usb/usb.h> [all …]
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| /freebsd/share/man/man4/ |
| H A D | uslcom.4 | 22 .Nd Silicon Laboratories CP2101/CP2102/CP2103/CP2104/CP2105 based USB serial adapter 27 .Bd -ragged -offset indent 28 .Cd "device usb" 36 .Bd -literal -offset indent 43 based USB serial adapters. 54 .Bl -bullet -compact 56 AC-Services CAN, CIS-IBUS, IBUS and OBD interfaces 60 AKTACOM ACE-1001 cable 64 Arkham DS-101 Adapter 70 AVIT Research USB-TTL interface [all …]
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