| /linux/drivers/clk/qcom/ |
| H A D | dispcc-sdm845.c | 289 static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { variable
295 .name = "disp_cc_mdss_pclk1_clk_src",
684 &disp_cc_mdss_pclk1_clk_src.clkr.hw,
807 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
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| H A D | dispcc-sm8250.c | 586 static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { variable
592 .name = "disp_cc_mdss_pclk1_clk_src",
1065 &disp_cc_mdss_pclk1_clk_src.clkr.hw,
1208 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
1315 &disp_cc_mdss_pclk1_clk_src, in disp_cc_sm8250_probe()
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| H A D | dispcc-x1e80100.c | 602 static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { variable
609 .name = "disp_cc_mdss_pclk1_clk_src",
1432 &disp_cc_mdss_pclk1_clk_src.clkr.hw,
1607 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
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| H A D | dispcc-sm8450.c | 637 static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { variable
644 .name = "disp_cc_mdss_pclk1_clk_src",
1524 &disp_cc_mdss_pclk1_clk_src.clkr.hw,
1748 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
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| H A D | dispcc-sm8550.c | 646 static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { variable
653 .name = "disp_cc_mdss_pclk1_clk_src",
1528 &disp_cc_mdss_pclk1_clk_src.clkr.hw,
1717 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
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| H A D | dispcc-sm8750.c | 720 static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = { variable
727 .name = "disp_cc_mdss_pclk1_clk_src",
1673 &disp_cc_mdss_pclk1_clk_src.clkr.hw,
1854 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp_cc_mdss_pclk1_clk_src.clkr,
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| H A D | dispcc-sc8280xp.c | 2947 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp0_cc_mdss_pclk1_clk_src.clkr,
3029 [DISP_CC_MDSS_PCLK1_CLK_SRC] = &disp1_cc_mdss_pclk1_clk_src.clkr,
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| /linux/include/dt-bindings/clock/ |
| H A D | qcom,dispcc-sdm845.h | 28 #define DISP_CC_MDSS_PCLK1_CLK_SRC 18 macro
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| H A D | qcom,dispcc-sm8350.h | 49 #define DISP_CC_MDSS_PCLK1_CLK_SRC 39 macro
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| H A D | qcom,dispcc-sm8250.h | 49 #define DISP_CC_MDSS_PCLK1_CLK_SRC 39 macro
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| H A D | qcom,dispcc-sm8150.h | 49 #define DISP_CC_MDSS_PCLK1_CLK_SRC 39 macro
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| H A D | qcom,x1e80100-dispcc.h | 76 #define DISP_CC_MDSS_PCLK1_CLK_SRC 66 macro
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| H A D | qcom,sm8550-dispcc.h | 79 #define DISP_CC_MDSS_PCLK1_CLK_SRC 69 macro
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| H A D | qcom,sm8450-dispcc.h | 78 #define DISP_CC_MDSS_PCLK1_CLK_SRC 68 macro
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| H A D | qcom,dispcc-sc8280xp.h | 78 #define DISP_CC_MDSS_PCLK1_CLK_SRC 68 macro
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,sdm670-mdss.yaml | 243 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
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| H A D | qcom,sdm845-mdss.yaml | 239 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
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| H A D | qcom,sm8250-mdss.yaml | 301 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
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| H A D | qcom,sm8550-mdss.yaml | 301 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
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| H A D | qcom,sm8150-mdss.yaml | 298 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
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| H A D | qcom,sm8450-mdss.yaml | 315 <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sdm845.dtsi | 4783 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
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