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/linux/drivers/infiniband/hw/mlx5/
H A Dqpc.c13 struct mlx5_core_dct *dct);
95 struct mlx5_core_dct *dct; in dct_event_notifier() local
99 qpn = be32_to_cpu(eqe->data.dct.dctn) & 0xFFFFFF; in dct_event_notifier()
101 dct = xa_load(&dev->qp_table.dct_xa, qpn); in dct_event_notifier()
102 if (dct) in dct_event_notifier()
103 complete(&dct->drained); in dct_event_notifier()
210 struct mlx5_core_dct *dct) in _mlx5_core_destroy_dct() argument
213 struct mlx5_core_qp *qp = &dct->mqp; in _mlx5_core_destroy_dct()
221 int mlx5_core_create_dct(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct, in mlx5_core_create_dct() argument
224 struct mlx5_core_qp *qp = &dct->mqp; in mlx5_core_create_dct()
[all …]
H A Dqp.h31 int mlx5_core_destroy_dct(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct);
34 int mlx5_core_dct_query(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct,
H A Dqp.c2743 qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); in create_dct()
2744 if (!qp->dct.in) in create_dct()
2747 MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); in create_dct()
2748 dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); in create_dct()
2771 if (attr->qp_type == IB_QPT_DRIVER && !MLX5_CAP_GEN(dev->mdev, dct)) in check_qp_type()
3209 err = mlx5_core_destroy_dct(dev, &mqp->dct.mdct); in mlx5_ib_destroy_dct()
3211 mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); in mlx5_ib_destroy_dct()
3216 kfree(mqp->dct.in); in mlx5_ib_destroy_dct()
4513 /* mlx5_ib_modify_dct: modify a DCT QP
4537 dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); in mlx5_ib_modify_dct()
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H A Ddevx.c696 qp->dct.mdct.mqp.qpn) == obj_id; in devx_is_valid_obj_id()
2498 obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff; in devx_get_obj_id_from_event()
/linux/drivers/media/platform/verisilicon/
H A Dhantro_g1_vp8_dec.c18 /* DCT partition base address regs */
71 /* DCT partition start bits regs */
207 * set control partition and DCT partition regs
217 * | tag 3B | extra 7B | hdr | mb_data | DCT sz | DCT part0 | ... | DCT partn |
223 * DCT size part
228 * 3. number of DCT parts is 1, 2, 4 or 8
285 * Calculate DCT partition info in cfg_parts()
286 * @dct_size_part_size: Containing sizes of DCT part, every DCT part in cfg_parts()
288 * DCT part in cfg_parts()
289 * @dct_part_offset: bytes offset of DCT parts from src_dma base addr in cfg_parts()
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H A Drockchip_vpu2_hw_vp8_dec.c387 * Calculate DCT partition info in cfg_parts()
388 * @dct_size_part_size: Containing sizes of DCT part, every DCT part in cfg_parts()
390 * DCT part in cfg_parts()
391 * @dct_part_offset: bytes offset of DCT parts from src_dma base addr in cfg_parts()
392 * @dct_part_total_len: total size of all DCT parts in cfg_parts()
401 /* Number of DCT partitions */ in cfg_parts()
405 /* DCT partition length */ in cfg_parts()
408 /* DCT partitions base address */ in cfg_parts()
/linux/drivers/accel/ivpu/
H A Divpu_pm.c461 ivpu_dbg(vdev, PM, "DCT requested %u%% (D0: %uus, D0i2: %uus)\n", in ivpu_pm_dct_enable()
466 ivpu_err_ratelimited(vdev, "Failed to enable DCT: %d\n", ret); in ivpu_pm_dct_enable()
479 ivpu_dbg(vdev, PM, "DCT requested to be disabled\n"); in ivpu_pm_dct_disable()
483 ivpu_err_ratelimited(vdev, "Failed to disable DCT: %d\n", ret); in ivpu_pm_dct_disable()
H A Dvpu_boot_api.h398 /* Microsecond value for DCT active cycle */
400 /* Microsecond value for DCT inactive cycle */
H A Dvpu_jsm_api.h598 * Control command: Enable survivability/DCT mode
603 * Control command: Disable survivability/DCT mode
760 * Response to control command: Enable survivability/DCT mode
765 * Response to control command: Disable survivability/DCT mode
1642 * Default values for DCT active/inactive times are 5.3ms and 30ms respectively,
H A Divpu_debugfs.c506 debugfs_create_file("dct", 0644, debugfs_root, vdev, &ivpu_dct_fops); in ivpu_debugfs_init()
/linux/drivers/media/pci/bt8xx/
H A Ddst.c463 } else if (!strncmp(state->fw_name, "DCT-CI", 6)) { in dst_set_symbolrate()
495 else if (!strncmp(state->fw_name, "DCT-CI", 6)) in dst_set_modulation()
644 .fw_name = "DCT-CI"
651 .fw_name = "DCT-CI"
658 .fw_name = "DCT-CI"
720 VP-2030 DCT-CI, Samsung, TS=204
721 VP-2021 DCT-CI, Unknown, TS=204
722 VP-2031 DCT-CI, Philips, TS=188
723 VP-2040 DCT-CI, Philips, TS=188, with CA daughter board
724 VP-2040 DCT-CI, Philips, TS=204, without CA daughter board
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/linux/drivers/i3c/master/mipi-i3c-hci/
H A Ddct.h7 * Common DCT related stuff
H A Ddct_v1.c14 #include "dct.h"
/linux/Documentation/admin-guide/media/
H A Divtv-cardlist.rst86 - Digital Cowboy DCT-MTVP1
H A Dbttv.rst1564 - DCT Card (DVB cable)
/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-jpeg.rst12 progressive baseline DCT compression process with Huffman entropy
H A Dext-ctrls-codec-stateless.rst996 - Number of DCT coefficients partitions. Must be one of: 1, 2, 4, or 8.
1005 - DCT coefficients sizes.
1399 - If set only frame-DCT and frame prediction are used.
/linux/drivers/soc/fsl/dpio/
H A Dqbman-portal.c1065 * @dct: the dequeue command type
1068 enum qbman_pull_type_e dct) in qbman_pull_desc_set_wq() argument
1070 d->verb |= dct << QB_VDQCR_VERB_DCT_SHIFT; in qbman_pull_desc_set_wq()
1080 * @dct: the dequeue command type
1083 enum qbman_pull_type_e dct) in qbman_pull_desc_set_channel() argument
1085 d->verb |= dct << QB_VDQCR_VERB_DCT_SHIFT; in qbman_pull_desc_set_channel()
H A Dqbman-portal.h215 enum qbman_pull_type_e dct);
217 enum qbman_pull_type_e dct);
/linux/arch/arm64/include/asm/
H A Dkvm_arm.h23 #define HCR_DCT __HCR(DCT)
/linux/drivers/media/usb/gspca/
H A Dpac7311.c512 0xff, 0xc0, /* SOF0: Start of Frame (Baseline DCT) */
H A Dpac7302.c751 0xff, 0xc0, /* SOF0: Start of Frame (Baseline DCT) */
/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dmain.c643 if (MLX5_CAP_GEN_MAX(dev, dct)) in handle_hca_cap()
644 MLX5_SET(cmd_hca_cap, set_hca_cap, dct, 1); in handle_hca_cap()
/linux/drivers/media/pci/ivtv/
H A Divtv-driver.c183 "\t\t\t18 = Digital Cowboy DCT-MTVP1\n"
/linux/fs/dlm/
H A Dlock.c2317 * DCT: This condition is all about new conversions being able to occur in _can_be_granted()

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