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/linux/arch/csky/lib/
H A Dstring.c112 unsigned long cu = (unsigned long)c; in memset() local
115 cu |= cu << 8; in memset()
116 cu |= cu << 16; in memset()
118 cu |= (cu << 16) << 16; in memset()
125 *dest.as_ulong++ = cu; in memset()
/linux/arch/m68k/fpsp040/
H A Dbugfix.S186 | cu src equal to xu dest or equal to nu dest. If so, go to
187 | op0. Else, or if opclass2, check for cu dest equal to
197 | Check for cu and nu register conflict. If one exists, this takes
198 | priority over a cu and xu conflict.
205 | Check for cu dest equal to nu dest. If so, go and fix the
212 | Check for cu and xu register conflict.
246 | We have the case in which a conflict exists between the cu src or
248 | the cu and restore the state, allowing the instruction in the
252 | restore the instruction from the cu to the frame and continue
262 | The cu savepc is set to zero, and the frame is restored to the
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H A Dfpsp.h110 .set CU_ONLY,LV+122 | cu-only flag
127 .set CU_SAVEPC,LV-92 | micro-pc for CU (1 byte)
139 .set FPIARCU,LV-60 | Instr. addr. reg. for CU (4 bytes)
/linux/drivers/net/ethernet/i825xx/
H A Dsun3_82586.h76 unsigned char cmd_cuc; /* command word: CU part & ACK */
95 #define CUC_MASK 0x07 /* mask for CU command */
99 #define CUC_SUSPEND 0x03 /* Suspend CU */
112 #define STAT_CX 0x80 /* CU finished cmd with its I bit set */
114 #define STAT_CNA 0x20 /* CU left active state */
117 #define CU_STATUS 0x7 /* CU status, 0=idle */
118 #define CU_SUSPEND 0x1 /* CU is suspended */
119 #define CU_ACTIVE 0x2 /* CU is active */
199 #define CMD_SUSPEND 0x4000 /* suspend CU after this CB */
/linux/scripts/gendwarfksyms/
H A Dgendwarfksyms.c55 Dwarf_CU *cu = NULL; in process_module() local
64 * Look for exported symbols in each CU, follow the DIE tree, and add in process_module()
68 res = dwarf_get_units(dbg, cu, &cu, NULL, NULL, &cudie, NULL); in process_module()
75 } while (cu); in process_module()
/linux/Documentation/devicetree/bindings/phy/
H A Dmicrochip,lan966x-serdes.yaml13 Lan966x has 7 interfaces, consisting of 2 copper transceivers(CU),
20 following macros are defined CU(X), SERDES6G(X), RGMII(X). Where X is a
22 CU(1) means use interface copper transceivers 1. SERDES6G(2) means use
/linux/drivers/net/wireless/realtek/rtw88/
H A DKconfig116 tristate "Realtek 8822CU USB wireless network adapter"
122 Select this option will enable support for 8822CU chipset
196 tristate "Realtek 8821CU USB wireless network adapter"
202 Select this option will enable support for 8821CU chipset
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager.c107 int i, se, sh, cu, cu_bitmap_sh_mul, cu_inc = wgp_mode_req ? 2 : 1; in mqd_symmetrically_map_cu_mask() local
117 * Returning with no CU's enabled will hang the queue, which should be in mqd_symmetrically_map_cu_mask()
193 for (cu = 0; cu < 16; cu += cu_inc) { in mqd_symmetrically_map_cu_mask()
196 if (cu_per_sh[se][sh] > cu) { in mqd_symmetrically_map_cu_mask()
198 se_mask[se] |= en_mask << (cu + sh * 16); in mqd_symmetrically_map_cu_mask()
H A Dkfd_topology.c1635 /* CU could be inactive. In case of shared cache find the first active in fill_in_l1_pcache()
1636 * CU. and incase of non-shared cache check if the CU is inactive. If in fill_in_l1_pcache()
1660 * inactive CU in fill_in_l1_pcache()
1701 /* To find the bitmap in the first active cu in the first in fill_in_l2_l3_pcache()
1703 * have at least one active cu. in fill_in_l2_l3_pcache()
1719 /* CU could be inactive. In case of shared cache find the first active in fill_in_l2_l3_pcache()
1720 * CU. and incase of non-shared cache check if the CU is inactive. If in fill_in_l2_l3_pcache()
1756 * inactive CU in fill_in_l2_l3_pcache()
1818 * will parse through all available CU in kfd_fill_cache_non_crat_info()
1820 * then it will consider only one CU from in kfd_fill_cache_non_crat_info()
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/linux/tools/perf/tests/shell/
H A Dtest_uprobe_from_different_cu.sh2 # test perf probe of function from different CU
19 temp_dir=$(mktemp -d /tmp/perf-uprobe-different-cu-sh.XXXXXXXXXX)
24 if [[ "${temp_dir}" =~ ^/tmp/perf-uprobe-different-cu-sh.*$ ]]; then
/linux/include/dt-bindings/phy/
H A Dphy-lan966x-serdes.h6 #define CU(x) (x) macro
7 #define CU_MAX CU(2)
/linux/tools/perf/util/
H A Ddwarf-aux.c18 * @cu_die: A DIE(dwarf information entry) of CU(compilation Unit)
49 * @cu_die: a CU DIE
110 * @cu_die: a CU DIE
148 * @cu_die: A CU DIE
455 /* Get the call file index number in CU DIE */
466 /* Get the declared file index number in CU DIE */
485 !dwarf_cu_die(attr_mem.cu, &cu_die, NULL, NULL, NULL, NULL, NULL, NULL) || in die_get_file_name()
582 * @cu_die: a CU DIE which including @addr
621 * @cu_die: a CU DIE which including @addr
716 * @cu_die: a CU DIE
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H A Ddwarf-aux.h113 * the lines inside the subprogram, otherwise the DIE must be a CU DIE.
176 /* Save all global variables in this CU */
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_3_0_cleaner_shader.asm28 // Launch 32 waves per CU (16 per SIMD) as a workgroup (threadgroup) to fill every wave slot
30 // Waves are launched in "CU" mode, and the workgroup shares 64KB of LDS (half of the WGP's LDS)
31 // It takes 2 workgroups to use all of LDS: one on each CU of the WGP
H A Dgfx_v10_1_10_cleaner_shader.asm27 // Launch 32 waves per CU (16 per SIMD) as a workgroup (threadgroup) to fill every wave slot
29 // Waves are launched in "CU" mode, and the workgroup shares 64KB of LDS (half of the WGP's LDS)
30 // It takes 2 workgroups to use all of LDS: one on each CU of the WGP
H A Dgfx_v9_4_3_cleaner_shader.asm30 // Launches one workgroup per CU, each workgroup with 4x wave64 per SIMD in the CU
39 // Launches a workgroup with 24 waves per workgroup, yielding 6 waves per SIMD in each CU
/linux/arch/s390/include/asm/
H A Dccwdev.h28 #define CCW_DEVICE(cu, cum) \ argument
29 .cu_type=(cu), .cu_model=(cum), \
33 #define CCW_DEVICE_DEVTYPE(cu, cum, dev, devm) \ argument
34 .cu_type=(cu), .cu_model=(cum), .dev_type=(dev), .dev_model=(devm),\
/linux/kernel/time/
H A Dclockevents.c410 struct ce_unbind *cu = arg; in __clockevents_unbind() local
414 res = __clockevents_try_unbind(cu->ce, smp_processor_id()); in __clockevents_unbind()
416 res = clockevents_replace(cu->ce); in __clockevents_unbind()
417 cu->res = res; in __clockevents_unbind()
427 struct ce_unbind cu = { .ce = ced, .res = -ENODEV }; in clockevents_unbind() local
429 smp_call_function_single(cpu, __clockevents_unbind, &cu, 1); in clockevents_unbind()
430 return cu.res; in clockevents_unbind()
/linux/lib/
H A Dhexdump.c48 unsigned char cu = ch & 0xdf; in hex_to_bin() local
51 ((cu - 'A' + 11) & (unsigned)((cu - 'F' - 1) & ('A' - 1 - cu)) >> 8); in hex_to_bin()
/linux/arch/arm/boot/dts/microchip/
H A Dlan966x-pcb8291.dts112 phys = <&serdes 0 CU(0)>;
119 phys = <&serdes 1 CU(1)>;
H A Dlan966x-pcb8309.dts181 phys = <&serdes 0 CU(0)>;
188 phys = <&serdes 1 CU(1)>;
H A Dlan966x-kontron-kswitch-d10-mmt.dtsi155 phys = <&serdes 0 CU(0)>;
162 phys = <&serdes 1 CU(1)>;
/linux/sound/pci/asihpi/
H A Dhpicmn.c393 phr->u.cu.tuner.s_level = 0; in hpi_check_control_cache_single()
397 phr->u.cu.tuner.s_level = in hpi_check_control_cache_single()
497 if (tocopy > sizeof(phr->u.cu.chars8.sz_data)) in hpi_check_control_cache_single()
498 tocopy = sizeof(phr->u.cu.chars8. in hpi_check_control_cache_single()
501 memcpy(phr->u.cu.chars8.sz_data, in hpi_check_control_cache_single()
504 phr->u.cu.chars8.remaining_chars = in hpi_check_control_cache_single()
H A Dhpifunc.c1436 && (hr.u.cu.chars8.remaining_chars + 8) > in hpi_control_get_string()
1445 c = hr.u.cu.chars8.sz_data[j]; in hpi_control_get_string()
1457 if ((hr.u.cu.chars8.remaining_chars == 0) in hpi_control_get_string()
1743 *pstatus = hr.u.cu.cobranet.status.status; in hpi_cobranet_hmi_get_status()
1746 hr.u.cu.cobranet.status.readable_size; in hpi_cobranet_hmi_get_status()
1749 hr.u.cu.cobranet.status.writeable_size; in hpi_cobranet_hmi_get_status()
2563 hm.u.cu.attribute = HPI_TUNER_LEVEL_AVG; in hpi_tuner_get_rf_level()
2566 *pw_level = hr.u.cu.tuner.s_level; in hpi_tuner_get_rf_level()
2579 hm.u.cu.attribute = HPI_TUNER_LEVEL_RAW; in hpi_tuner_get_raw_rf_level()
2582 *pw_level = hr.u.cu.tuner.s_level; in hpi_tuner_get_raw_rf_level()
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/linux/Documentation/devicetree/bindings/arm/
H A Dmicrochip,sparx5.yaml42 gigabit switch with 48+4 Cu ports. It features spi-nor and

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