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Searched full:core (Results 1 – 25 of 3477) sorted by relevance

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/freebsd/lib/libpmc/pmu-events/arch/x86/
H A D	mapfile.csv	`2 GenuineIntel-6-56,v5,broadwellde,core 3 GenuineIntel-6-3D,v17,broadwell,core 4 GenuineIntel-6-47,v17,broadwell,core 5 GenuineIntel-6-4F,v10,broadwellx,core 6 GenuineIntel-6-1C,v4,bonnell,core 7 GenuineIntel-6-26,v4,bonnell,core 8 GenuineIntel-6-27,v4,bonnell,core 9 GenuineIntel-6-36,v4,bonnell,core 10 GenuineIntel-6-35,v4,bonnell,core 11 GenuineIntel-6-5C,v8,goldmont,core [all …]`
/freebsd/sys/gnu/dev/bwn/phy_n/
H A D	if_bwn_radio_2055.h	34 #define B2055_C1_SP_RSSI 0x03 /* SP RSSI Core 1 / 35 #define B2055_C1_SP_PDMISC 0x04 / SP PD MISC Core 1 / 36 #define B2055_C2_SP_RSSI 0x05 / SP RSSI Core 2 / 37 #define B2055_C2_SP_PDMISC 0x06 / SP PD MISC Core 2 / 38 #define B2055_C1_SP_RXGC1 0x07 / SP RX GC1 Core 1 / 39 #define B2055_C1_SP_RXGC2 0x08 / SP RX GC2 Core 1 / 40 #define B2055_C2_SP_RXGC1 0x09 / SP RX GC1 Core 2 / 41 #define B2055_C2_SP_RXGC2 0x0A / SP RX GC2 Core 2 / 42 #define B2055_C1_SP_LPFBWSEL 0x0B / SP LPF BW select Core 1 / 43 #define B2055_C2_SP_LPFBWSEL 0x0C / SP LPF BW select Core 2 */ [all …]
/freebsd/lib/libpmc/pmu-events/arch/arm64/
H A D	mapfile.csv	`11 # Type is core, uncore etc 15 0x00000000410fd020,v1,arm/cortex-a34,core 16 0x00000000410fd030,v1,arm/cortex-a53,core 17 0x00000000420f1000,v1,arm/cortex-a53,core 18 0x00000000410fd040,v1,arm/cortex-a35,core 19 0x00000000410fd050,v1,arm/cortex-a55,core 20 0x00000000410fd060,v1,arm/cortex-a65,core 21 0x00000000410fd070,v1,arm/cortex-a57-a72,core 22 0x00000000410fd080,v1,arm/cortex-a57-a72,core 23 0x00000000410fd090,v1,arm/cortex-a73,core [all …]`
/freebsd/stand/lua/
H A D	menu.lua	`31 local core = require("core") 41 entry_type = core.MENU_RETURN, 75 [core.MENU_ENTRY] = function(_, entry) 79 [core.MENU_CAROUSEL_ENTRY] = function(_, entry) 93 [core.MENU_SUBMENU] = function(_, entry) 96 [core.MENU_RETURN] = function(_, entry) 111 entry_type = core.MENU_CAROUSEL_ENTRY, 113 items = core.bootenvList, 139 entry_type = core.MENU_ENTRY, 141 return core.isRewinded() == false [all …]`
H A D	core.lua	`33 local core = {} 53 default_acpi = core.getACPI() 57 core.setACPI(default_acpi) 58 core.setSingleUser(default_single_user) 59 core.setVerbose(default_verbose) 93 core.KEY_BACKSPACE = 8 94 core.KEY_ENTER = 13 95 core.KEY_DELETE = 127 99 core.KEYSTR_ESCAPE = "\027" 100 core.KEYSTR_CSI = core.KEYSTR_ESCAPE .. "[" [all …]`
H A D	core.lua.8	`31 .Nm core.lua 32 .Nd bootloader core module 35 contains core functionality that does not have a more fitting module. 41 .Dl local core = require("core") 93 .Bl -tag -width core.setSingleUser -offset indent 94 .It Fn core.setVerbose verbose 100 .It Fn core.setSingleUser singleUser 106 .It Fn core.getACPI 109 .It Fn core.hasACPI 114 .It Fn core.setACPI acpi [all …]`
H A D	menu.lua.8	`96 .Ic core.MENU_SEPARATOR 112 .Ic core.MENU_SEPARATOR . 115 .Xr core.lua 8 . 117 .Bl -tag -width core.MENU_CAROUSEL_ENTRY -offset indent 118 .It Ic core.MENU_RETURN 127 .It Ic core.MENU_ENTRY 132 .It Ic core.MENU_SEPARATOR 136 .It Ic core.MENU_SUBMENU 142 .It Ic core.MENU_CAROUSEL_ENTRY 174 local core = require("core") [all …]`
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A D	mvebu-core-clock.txt	1 * Core Clock bindings for Marvell MVEBU SoCs 3 Marvell MVEBU SoCs usually allow to determine core clock frequencies by 4 reading the Sample-At-Reset (SAR) register. The core clock consumer should 53 "marvell,armada-370-core-clock" - For Armada 370 SoC core clocks 54 "marvell,armada-375-core-clock" - For Armada 375 SoC core clocks 55 "marvell,armada-380-core-clock" - For Armada 380/385 SoC core clocks 56 "marvell,armada-390-core-clock" - For Armada 39x SoC core clocks 57 "marvell,armada-xp-core-clock" - For Armada XP SoC core clocks 58 "marvell,mv98dx3236-core-clock" - For 98dx3236 family SoC core clocks 59 "marvell,dove-core-clock" - for Dove SoC core clocks [all …]
H A D	marvell,mvebu-core-clock.yaml	4 $id: http://devicetree.org/schemas/clock/marvell,mvebu-core-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell MVEBU SoC core clock 14 Marvell MVEBU SoCs usually allow to determine core clock frequencies by 15 reading the Sample-At-Reset (SAR) register. The core clock consumer should 65 - marvell,armada-370-core-clock 66 - marvell,armada-375-core-clock 67 - marvell,armada-380-core-clock 68 - marvell,armada-390-core-clock 69 - marvell,armada-xp-core-clock [all …]
/freebsd/lib/libprocstat/
H A D	core.c	48 #include "core.h" 118 static bool core_offset(struct procstat_core core, off_t offset); 119 static bool core_read(struct procstat_core core, void buf, size_t len); 120 static ssize_t core_read_mem(struct procstat_core core, void buf, 122 static void get_args(struct procstat_core core, vm_offset_t psstrings, 128 struct procstat_core core; in procstat_core_open() local 158 warnx("%s is not a CORE file", filename); in procstat_core_open() 177 core = malloc(sizeof(struct procstat_core)); in procstat_core_open() 178 if (core == NULL) { in procstat_core_open() 182 core->pc_magic = PROCSTAT_CORE_MAGIC; in procstat_core_open() [all …]
/freebsd/lib/libpmc/
H A D	pmc.core.3	`28 .Nm pmc.core 31 .Tn Core Solo 33 .Tn Core Duo 41 .Tn "Core Solo" 43 .Tn "Core Duo" 112 Events that require core-specificity to be specified use a 114 .Dq Li core= Ns Ar value , 122 Measure event conditions on this core. 182 Core PMCs support the following events: 271 .It Li Bus_Locks_Clocks Op ,core= Ns Ar core [all …]`
H A D	pmc.atom.3	`120 Events that require core-specificity to be specified use a 122 .Dq Li core= Ns Ar core , 124 .Ar core 130 Measure event conditions on this core. 324 .It Li BUSQ_EMPTY Op ,core= Ns Ar core 326 The number of cycles during which the core did not have any pending 332 .It Li BUS_DATA_RCV Op ,core= Ns Ar core 353 .It Li BUS_IO_WAIT Op ,core= Ns Ar core 355 The number of core cycles during which I/O requests wait in the bus 359 .Op ,core= Ns Ar core [all …]`
H A D	pmc.core2.3	`119 Events that require core-specificity to be specified use a 121 .Dq Li core= Ns Ar core , 123 .Ar core 129 Measure event conditions on this core. 320 .It Li BUSQ_EMPTY Op ,core= Ns Ar core 322 The number of cycles during which the core did not have any pending 327 .It Li BUS_DATA_RCV Op ,core= Ns Ar core 344 .It Li BUS_IO_WAIT Op ,core= Ns Ar core 346 The number of core cycles during which I/O requests wait in the bus 350 .Op ,core= Ns Ar core [all …]`
/freebsd/lib/libpmc/pmu-events/arch/x86/ivybridge/
H A D	uncore-cache.json	163 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in so… 168 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in s… 173 "BriefDescription": "An external snoop hits a modified line in some processor core.", 178 "PublicDescription": "An external snoop hits a modified line in some processor core.", 183 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits … 188 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits … 193 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line i… 198 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line … 203 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 208 "PublicDescription": "An external snoop hits a non-modified line in some processor core.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/sandybridge/
H A D	uncore-cache.json	163 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in so… 168 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in s… 173 "BriefDescription": "An external snoop hits a modified line in some processor core.", 178 "PublicDescription": "An external snoop hits a modified line in some processor core.", 183 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits … 188 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits … 193 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line i… 198 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line … 203 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 208 "PublicDescription": "An external snoop hits a non-modified line in some processor core.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/haswell/
H A D	uncore-cache.json	163 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in so… 168 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in s… 173 "BriefDescription": "An external snoop hits a modified line in some processor core.", 178 "PublicDescription": "An external snoop hits a modified line in some processor core.", 183 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits … 188 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits … 193 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line i… 198 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line … 203 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 208 "PublicDescription": "An external snoop hits a non-modified line in some processor core.", [all …]
H A D	uncore.json	7 "BriefDescription": "An external snoop misses in some processor core.", 8 "PublicDescription": "An external snoop misses in some processor core.", 19 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic… 20 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic… 31 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor c… 32 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor … 43 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 44 "PublicDescription": "An external snoop hits a non-modified line in some processor core.", 55 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a … 56 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a … [all …]
/freebsd/usr.sbin/crashinfo/
H A D	crashinfo.8	`33 .Nd "analyze a core dump of the operating system" 39 .Op Ar core 43 utility analyzes a core dump saved by 46 the core dump. 47 For a given core dump file named 50 .Pa core.txt.XX . 54 analyzes the most recent core dump in the core dump directory. 55 A specific core dump may be specified via either the 56 .Ar core 62 has located a core dump, [all …]`
/freebsd/sys/dev/bhnd/bcma/
H A D	bcma_erom.c	55 * The EROM core address can be found at BCMA_CC_EROM_ADDR within the 58 * core descriptor records. 60 * The final core descriptor is followed by a 32-bit BCMA_EROM_TABLE_EOF (0xF) 89 struct bhnd_core_info core); 92 struct bcma_erom_core core); 100 static void bcma_erom_to_core_info(const struct bcma_erom_core core, 125 return "core"; in bcma_erom_entry_type_name() 170 core / in bcma_erom_probe() 202 struct bhnd_core_info core) in bcma_erom_lookup_core() argument 206 /* Search for the first matching core */ in bcma_erom_lookup_core() [all …]
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A D	ti,c64x+megamod-pic.txt	4 * C64X+ Core Interrupt Controller 6 The core interrupt controller provides 16 prioritized interrupts to the 7 C64X+ core. Priority 0 and 1 are used for reset and NMI respectively. 9 sources coming from outside the core. 13 - compatible: Should be "ti,c64x+core-pic"; 18 Single cell specifying the core interrupt priority level (4-15) where 26 compatible = "ti,c64x+core-pic"; 35 may be cascaded into the core interrupt controller. The megamodule PIC 36 has a total of 12 outputs cascading into the core interrupt controller. 37 One for each core interrupt priority level. In addition to the combined [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/
H A D	uncore.json	7 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic… 8 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic… 19 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor c… 20 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor … 31 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a … 32 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a … 43 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits … 44 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits … 175 …"BriefDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is def… 176 …"PublicDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is de… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/
H A D	uncore.json	7 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic… 8 …Description": "A cross-core snoop initiated by this Cbox due to processor core memory request whic… 19 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor c… 20 …"PublicDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor … 31 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a … 32 …on": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a … 43 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits … 44 …tion": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits … 187 …"BriefDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is def… 188 …"PublicDescription": "Each cycle count number of all Core outgoing valid entries. Such entry is de… [all …]
/freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/
H A D	cache.json	23 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 due to a demand … 24 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 due to either o… 35 …processor's data cache was reloaded from a localtion other than the local core's L2 due to a deman… 36 …processor's data cache was reloaded from a localtion other than the local core's L2 due to either … 41 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st… 42 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 with load hit s… 47 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with dispatch co… 48 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 with dispatch c… 53 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 hit without disp… 54 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 hit without dis… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/amdzen5/
H A D	data-fabric.json	772 … "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface… 780 … "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface… 788 … "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface… 796 … "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface… 804 … "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface… 812 … "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface… 820 … "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface… 828 … "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface… 836 … "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface… 844 … "Inbound data beats (32 bytes) for transactions between local socket and Core-to-Fabric Interface… [all …]
/freebsd/sys/dev/bhnd/siba/
H A D	siba_erom.c	73 bhnd_addr_t base_addr; /*< address of first core / 74 u_int ncores; /*< core count / 98 /* Initialize I/O context, assuming at least the first core is mapped / in siba_erom_probe() 111 Verify the first core's IDHIGH/IDLOW identification. in siba_erom_probe() 113 * The core must be a Broadcom core, but must not be in siba_erom_probe() 114 * a chipcommon core; those shouldn't be hinted. in siba_erom_probe() 116 * The first core on EXTIF-equipped devices varies, but on the in siba_erom_probe() 117 * BCM4710, it's a SDRAM core (0x803). in siba_erom_probe() 168 /* Attempt to map the full core enumeration space / in siba_erom_init() 204 @param core_idx Core index. [all …]

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