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/linux/drivers/isdn/hardware/mISDN/
H A DmISDNisar.c69 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { in send_mbox()
98 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { in rcv_mbox()
175 u32 saved_debug = isar->ch[0].bch.debug; in load_firmware()
194 isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO; in load_firmware()
281 isar->ch[0].bch.debug = saved_debug; in load_firmware()
393 isar->ch[0].bch.debug = saved_debug; in load_firmware()
402 deliver_status(struct isar_ch *ch, int status) in deliver_status() argument
404 pr_debug("%s: HL->LL FAXIND %x\n", ch->is->name, status); in deliver_status()
405 _queue_data(&ch->bch.ch, PH_CONTROL_IND, status, 0, NULL, GFP_ATOMIC); in deliver_status()
409 isar_rcv_frame(struct isar_ch *ch) in isar_rcv_frame() argument
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/brcmutil/
H A Dd11.c41 static void brcmu_d11n_encchspec(struct brcmu_chan *ch) in brcmu_d11n_encchspec() argument
43 if (ch->bw == BRCMU_CHAN_BW_20) in brcmu_d11n_encchspec()
44 ch->sb = BRCMU_CHAN_SB_NONE; in brcmu_d11n_encchspec()
46 ch->chspec = 0; in brcmu_d11n_encchspec()
47 brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_CH_MASK, in brcmu_d11n_encchspec()
48 BRCMU_CHSPEC_CH_SHIFT, ch->chnum); in brcmu_d11n_encchspec()
49 brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11N_SB_MASK, in brcmu_d11n_encchspec()
50 0, d11n_sb(ch->sb)); in brcmu_d11n_encchspec()
51 brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11N_BW_MASK, in brcmu_d11n_encchspec()
52 0, d11n_bw(ch->bw)); in brcmu_d11n_encchspec()
[all …]
/linux/drivers/misc/sgi-xp/
H A Dxpc_channel.c27 xpc_process_connect(struct xpc_channel *ch, unsigned long *irq_flags) in xpc_process_connect() argument
31 lockdep_assert_held(&ch->lock); in xpc_process_connect()
33 if (!(ch->flags & XPC_C_OPENREQUEST) || in xpc_process_connect()
34 !(ch->flags & XPC_C_ROPENREQUEST)) { in xpc_process_connect()
38 DBUG_ON(!(ch->flags & XPC_C_CONNECTING)); in xpc_process_connect()
40 if (!(ch->flags & XPC_C_SETUP)) { in xpc_process_connect()
41 spin_unlock_irqrestore(&ch->lock, *irq_flags); in xpc_process_connect()
42 ret = xpc_arch_ops.setup_msg_structures(ch); in xpc_process_connect()
43 spin_lock_irqsave(&ch->lock, *irq_flags); in xpc_process_connect()
46 XPC_DISCONNECT_CHANNEL(ch, ret, irq_flags); in xpc_process_connect()
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dpio_phy_regs.h13 #define _VLV_PLL(ch, dw) (0x8000 + (ch) * 0x20 + (dw) * 4) /* dw 0-7,16-23 */ argument
14 #define _CHV_PLL(ch, dw) (0x8000 + (ch) * 0x180 + (dw) * 4) argument
16 #define _VLV_PCS(ch, spline, dw) (0x200 + (ch) * 0x2400 + (spline) * 0x200 + (dw) * 4) argument
17 #define _VLV_PCS_GRP(ch, dw) (0x8200 + (ch) * 0x200 + (dw) * 4) argument
19 #define _VLV_TX(ch, lane, dw) (0x80 + (ch) * 0x2400 + (lane) * 0x200 + (dw) * 4) argument
20 #define _VLV_TX_GRP(ch, dw) (0x8280 + (ch) * 0x200 + (dw) * 4) argument
26 #define VLV_PLL_DW3(ch) _VLV_PLL((ch), 3) argument
47 #define VLV_PLL_DW5(ch) _VLV_PLL((ch), 5) argument
55 #define VLV_PLL_DW7(ch) _VLV_PLL((ch), 7) argument
57 #define VLV_PLL_DW16(ch) _VLV_PLL((ch), 16) argument
[all …]
H A Dbxt_dpio_phy_regs.h23 #define _BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \ argument
24 (BXT_PHY_BASE(phy) + _PIPE((ch), (reg_ch0) - _BXT_PHY0_BASE, \
26 #define _MMIO_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \ argument
27 _MMIO(_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1))
30 #define _MMIO_BXT_PHY_CH_LN(phy, ch, lane, reg_ch0, reg_ch1) \ argument
31 _MMIO(_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) + _BXT_LANE_OFFSET(lane))
51 #define BXT_PORT_PLL_EBB_0(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
60 #define BXT_PORT_PLL_EBB_4(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
95 #define _PORT_PLL_BASE(phy, ch) _BXT_PHY_CH(phy, ch, \ argument
98 #define BXT_PORT_PLL(phy, ch, idx) _MMIO(_PORT_PLL_BASE(phy, ch) + \ argument
[all …]
/linux/drivers/clocksource/
H A Dsh_cmt.c241 static inline u32 sh_cmt_read_cmstr(struct sh_cmt_channel *ch) in sh_cmt_read_cmstr() argument
243 if (ch->iostart) in sh_cmt_read_cmstr()
244 return ch->cmt->info->read_control(ch->iostart, 0); in sh_cmt_read_cmstr()
246 return ch->cmt->info->read_control(ch->cmt->mapbase, 0); in sh_cmt_read_cmstr()
249 static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch, u32 value) in sh_cmt_write_cmstr() argument
251 u32 old_value = sh_cmt_read_cmstr(ch); in sh_cmt_write_cmstr()
254 if (ch->iostart) { in sh_cmt_write_cmstr()
255 ch->cmt->info->write_control(ch->iostart, 0, value); in sh_cmt_write_cmstr()
256 udelay(ch->cmt->reg_delay); in sh_cmt_write_cmstr()
258 ch->cmt->info->write_control(ch->cmt->mapbase, 0, value); in sh_cmt_write_cmstr()
[all …]
H A Dsh_tmu.c84 static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr) in sh_tmu_read() argument
89 switch (ch->tmu->model) { in sh_tmu_read()
91 return ioread8(ch->tmu->mapbase + 2); in sh_tmu_read()
93 return ioread8(ch->tmu->mapbase + 4); in sh_tmu_read()
100 return ioread16(ch->base + offs); in sh_tmu_read()
102 return ioread32(ch->base + offs); in sh_tmu_read()
105 static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr, in sh_tmu_write() argument
111 switch (ch->tmu->model) { in sh_tmu_write()
113 return iowrite8(value, ch->tmu->mapbase + 2); in sh_tmu_write()
115 return iowrite8(value, ch->tmu->mapbase + 4); in sh_tmu_write()
[all …]
H A Dsh_mtu2.c156 static inline unsigned long sh_mtu2_read(struct sh_mtu2_channel *ch, int reg_nr) in sh_mtu2_read() argument
161 return ioread8(ch->mtu->mapbase + 0x280); in sh_mtu2_read()
166 return ioread16(ch->base + offs); in sh_mtu2_read()
168 return ioread8(ch->base + offs); in sh_mtu2_read()
171 static inline void sh_mtu2_write(struct sh_mtu2_channel *ch, int reg_nr, in sh_mtu2_write() argument
177 return iowrite8(value, ch->mtu->mapbase + 0x280); in sh_mtu2_write()
182 iowrite16(value, ch->base + offs); in sh_mtu2_write()
184 iowrite8(value, ch->base + offs); in sh_mtu2_write()
187 static void sh_mtu2_start_stop_ch(struct sh_mtu2_channel *ch, int start) in sh_mtu2_start_stop_ch() argument
192 raw_spin_lock_irqsave(&ch->mtu->lock, flags); in sh_mtu2_start_stop_ch()
[all …]
/linux/drivers/gpu/drm/imx/dcss/
H A Ddcss-dpr.c118 struct dcss_dpr_ch ch[3]; member
121 static void dcss_dpr_write(struct dcss_dpr_ch *ch, u32 val, u32 ofs) in dcss_dpr_write() argument
123 struct dcss_dpr *dpr = ch->dpr; in dcss_dpr_write()
125 dcss_ctxld_write(dpr->ctxld, dpr->ctx_id, val, ch->base_ofs + ofs); in dcss_dpr_write()
130 struct dcss_dpr_ch *ch; in dcss_dpr_ch_init_all() local
134 ch = &dpr->ch[i]; in dcss_dpr_ch_init_all()
136 ch->base_ofs = dpr_base + i * 0x1000; in dcss_dpr_ch_init_all()
138 ch->base_reg = devm_ioremap(dpr->dev, ch->base_ofs, SZ_4K); in dcss_dpr_ch_init_all()
139 if (!ch->base_reg) { in dcss_dpr_ch_init_all()
140 dev_err(dpr->dev, "dpr: unable to remap ch %d base\n", in dcss_dpr_ch_init_all()
[all …]
/linux/drivers/scsi/
H A Dch.c87 #define ch_printk(prefix, ch, fmt, a...) \ argument
88 sdev_prefix_printk(prefix, (ch)->device, (ch)->name, fmt, ##a)
93 ch_printk(KERN_DEBUG, ch, fmt, ##arg); \
98 ch_printk(level, ch, fmt, ##arg); \
187 ch_do_scsi(scsi_changer *ch, unsigned char *cmd, int cmd_len, in ch_do_scsi() argument
213 result = scsi_execute_cmd(ch->device, cmd, op, buffer, buflength, in ch_do_scsi()
219 scsi_print_sense_hdr(ch->device, ch->name, &sshdr); in ch_do_scsi()
228 ch_elem_to_typecode(scsi_changer *ch, u_int elem) in ch_elem_to_typecode() argument
233 if (elem >= ch->firsts[i] && in ch_elem_to_typecode()
234 elem < ch->firsts[i] + in ch_elem_to_typecode()
[all …]
/linux/drivers/s390/net/
H A Dctcm_fsms.c188 * ch : The channel, the error belongs to.
191 void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg) in ctcm_ccw_check_rc() argument
195 CTCM_FUNTAIL, ch->id, msg, rc); in ctcm_ccw_check_rc()
199 ch->id); in ctcm_ccw_check_rc()
200 fsm_event(ch->fsm, CTC_EVENT_IO_EBUSY, ch); in ctcm_ccw_check_rc()
204 ch->id); in ctcm_ccw_check_rc()
205 fsm_event(ch->fsm, CTC_EVENT_IO_ENODEV, ch); in ctcm_ccw_check_rc()
210 fsm_event(ch->fsm, CTC_EVENT_IO_UNKNOWN, ch); in ctcm_ccw_check_rc()
248 struct channel *ch = arg; in chx_txdone() local
249 struct net_device *dev = ch->netdev; in chx_txdone()
[all …]
H A Dctcm_main.c72 * ch The channel where this skb has been received.
75 void ctcm_unpack_skb(struct channel *ch, struct sk_buff *pskb) in ctcm_unpack_skb() argument
77 struct net_device *dev = ch->netdev; in ctcm_unpack_skb()
91 if ((ch->protocol == CTCM_PROTO_S390) && in ctcm_unpack_skb()
93 if (!(ch->logflags & LOG_FLAG_ILLEGALPKT)) { in ctcm_unpack_skb()
94 ch->logflags |= LOG_FLAG_ILLEGALPKT; in ctcm_unpack_skb()
113 if (!(ch->logflags & LOG_FLAG_ILLEGALSIZE)) { in ctcm_unpack_skb()
119 ch->logflags |= LOG_FLAG_ILLEGALSIZE; in ctcm_unpack_skb()
130 if (!(ch->logflags & LOG_FLAG_OVERRUN)) { in ctcm_unpack_skb()
135 ch->logflags |= LOG_FLAG_OVERRUN; in ctcm_unpack_skb()
[all …]
H A Dctcm_mpc.c108 static void ctcmpc_unpack_skb(struct channel *ch, struct sk_buff *pskb);
274 ctcm_pr_debug("th->ch : %02x\n", header->th_ch_flag); in ctcmpc_dump_skb()
612 struct channel *rch = mpcginfo->ch; in mpc_rcvd_sweep_resp()
616 struct channel *ch = priv->channel[CTCM_WRITE]; in mpc_rcvd_sweep_resp() local
618 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, ch, ch->id); in mpc_rcvd_sweep_resp()
625 fsm_deltimer(&ch->sweep_timer); in mpc_rcvd_sweep_resp()
628 ch->th_seq_num = 0x00; in mpc_rcvd_sweep_resp()
647 struct channel *ch = priv->channel[CTCM_WRITE]; in ctcmpc_send_sweep_resp() local
649 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, rch, rch->id); in ctcmpc_send_sweep_resp()
661 header->sw.th_last_seq = ch->th_seq_num; in ctcmpc_send_sweep_resp()
[all …]
/linux/drivers/isdn/mISDN/
H A Dhwchannel.c46 if (likely(bch->ch.peer)) { in bchannel_bh()
47 err = bch->ch.recv(bch->ch.peer, skb); in bchannel_bh()
57 mISDN_initdchannel(struct dchannel *ch, int maxlen, void *phf) in mISDN_initdchannel() argument
59 test_and_set_bit(FLG_HDLC, &ch->Flags); in mISDN_initdchannel()
60 ch->maxlen = maxlen; in mISDN_initdchannel()
61 ch->hw = NULL; in mISDN_initdchannel()
62 ch->rx_skb = NULL; in mISDN_initdchannel()
63 ch->tx_skb = NULL; in mISDN_initdchannel()
64 ch->tx_idx = 0; in mISDN_initdchannel()
65 ch->phfunc = phf; in mISDN_initdchannel()
[all …]
H A Dstack.c36 mISDN_queue_message(struct mISDNchannel *ch, struct sk_buff *skb) in mISDN_queue_message() argument
38 _queue_message(ch->st, skb); in mISDN_queue_message()
45 struct mISDNchannel *ch; in get_channel4id() local
48 list_for_each_entry(ch, &st->layer2, list) { in get_channel4id()
49 if (id == ch->nr) in get_channel4id()
52 ch = NULL; in get_channel4id()
55 return ch; in get_channel4id()
86 struct mISDNchannel *ch; in send_layer2() local
93 list_for_each_entry(ch, &st->layer2, list) { in send_layer2()
94 if (list_is_last(&ch->list, &st->layer2)) { in send_layer2()
[all …]
/linux/drivers/rapidio/
H A Drio_cm.c222 static int riocm_ch_close(struct rio_channel *ch);
244 static int riocm_cmp(struct rio_channel *ch, enum rio_cm_state cmp) in riocm_cmp() argument
248 spin_lock_bh(&ch->lock); in riocm_cmp()
249 ret = (ch->state == cmp); in riocm_cmp()
250 spin_unlock_bh(&ch->lock); in riocm_cmp()
254 static int riocm_cmp_exch(struct rio_channel *ch, in riocm_cmp_exch() argument
259 spin_lock_bh(&ch->lock); in riocm_cmp_exch()
260 ret = (ch->state == cmp); in riocm_cmp_exch()
262 ch->state = exch; in riocm_cmp_exch()
263 spin_unlock_bh(&ch->lock); in riocm_cmp_exch()
[all …]
/linux/sound/soc/codecs/
H A Drk3308_codec.h24 #define RK3308_ADC_DIG_OFFSET(ch) (((ch) & 0x3) * 0xc0 + 0x0) argument
26 #define RK3308_ADC_DIG_CON01(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x04) argument
27 #define RK3308_ADC_DIG_CON02(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x08) argument
28 #define RK3308_ADC_DIG_CON03(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x0c) argument
29 #define RK3308_ADC_DIG_CON04(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x10) argument
30 #define RK3308_ADC_DIG_CON05(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x14) // ver.C only argument
31 #define RK3308_ADC_DIG_CON06(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x18) // ver.C only argument
32 #define RK3308_ADC_DIG_CON07(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x1c) argument
34 #define RK3308_ALC_L_DIG_CON00(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x40) argument
35 #define RK3308_ALC_L_DIG_CON01(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x44) argument
[all …]
H A Didt821034.c38 } ch[IDT821034_NB_CHANNEL]; member
44 } ch[IDT821034_NB_CHANNEL]; member
119 static int idt821034_set_channel_power(struct idt821034 *idt821034, u8 ch, u8 power) in idt821034_set_channel_power() argument
124 dev_dbg(&idt821034->spi->dev, "set_channel_power(%u, 0x%x)\n", ch, power); in idt821034_set_channel_power()
126 conf = IDT821034_MODE_CODEC(ch) | idt821034->cache.codec_conf; in idt821034_set_channel_power()
131 idt821034->cache.ch[ch].rx_slot); in idt821034_set_channel_power()
138 idt821034->cache.ch[ch].tx_slot); in idt821034_set_channel_power()
148 idt821034->cache.ch[c in idt821034_set_channel_power()
153 idt821034_get_channel_power(struct idt821034 * idt821034,u8 ch) idt821034_get_channel_power() argument
208 idt821034_set_channel_ts(struct idt821034 * idt821034,u8 ch,u8 ch_dir,u8 ts_num) idt821034_set_channel_ts() argument
245 idt821034_set_slic_conf(struct idt821034 * idt821034,u8 ch,u8 slic_dir) idt821034_set_slic_conf() argument
262 idt821034_get_slic_conf(struct idt821034 * idt821034,u8 ch) idt821034_get_slic_conf() argument
267 idt821034_write_slic_raw(struct idt821034 * idt821034,u8 ch,u8 slic_raw) idt821034_write_slic_raw() argument
292 idt821034_get_written_slic_raw(struct idt821034 * idt821034,u8 ch) idt821034_get_written_slic_raw() argument
297 idt821034_read_slic_raw(struct idt821034 * idt821034,u8 ch,u8 * slic_raw) idt821034_read_slic_raw() argument
332 idt821034_set_gain_channel(struct idt821034 * idt821034,u8 ch,u8 gain_type,u16 gain_val) idt821034_set_gain_channel() argument
412 u8 ch; idt821034_kctrl_gain_get() local
446 u8 ch; idt821034_kctrl_gain_put() local
494 u8 ch; idt821034_kctrl_mute_get() local
519 u8 ch; idt821034_kctrl_mute_put() local
627 u8 ch; idt821034_power_event() local
704 u8 ch; idt821034_dai_set_tdm_slot() local
963 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_gpio_set() local
989 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_gpio_get() local
1014 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_get_direction() local
1028 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_direction_input() local
1054 u8 ch = IDT821034_GPIO_OFFSET_TO_SLIC_CHANNEL(offset); idt821034_chip_direction_output() local
[all...]
/linux/drivers/phy/renesas/
H A Dphy-rcar-gen3-usb2.c124 struct rcar_gen3_chan *ch; member
168 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan, in rcar_gen3_phy_usb2_work() local
171 if (ch->extcon_host) { in rcar_gen3_phy_usb2_work()
172 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true); in rcar_gen3_phy_usb2_work()
173 extcon_set_state_sync(ch->extcon, EXTCON_USB, false); in rcar_gen3_phy_usb2_work()
175 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false); in rcar_gen3_phy_usb2_work()
176 extcon_set_state_sync(ch->extcon, EXTCON_USB, true); in rcar_gen3_phy_usb2_work()
180 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host) in rcar_gen3_set_host_mode() argument
182 void __iomem *usb2_base = ch->base; in rcar_gen3_set_host_mode()
185 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host); in rcar_gen3_set_host_mode()
[all …]
/linux/drivers/infiniband/ulp/srp/
H A Dib_srp.c303 static int srp_new_ib_cm_id(struct srp_rdma_ch *ch) in srp_new_ib_cm_id() argument
305 struct srp_target_port *target = ch->target; in srp_new_ib_cm_id()
309 srp_ib_cm_handler, ch); in srp_new_ib_cm_id()
313 if (ch->ib_cm.cm_id) in srp_new_ib_cm_id()
314 ib_destroy_cm_id(ch->ib_cm.cm_id); in srp_new_ib_cm_id()
315 ch->ib_cm.cm_id = new_cm_id; in srp_new_ib_cm_id()
318 ch->ib_cm.path.rec_type = SA_PATH_REC_TYPE_OPA; in srp_new_ib_cm_id()
320 ch->ib_cm.path.rec_type = SA_PATH_REC_TYPE_IB; in srp_new_ib_cm_id()
321 ch->ib_cm.path.sgid = target->sgid; in srp_new_ib_cm_id()
322 ch->ib_cm.path.dgid = target->ib_cm.orig_dgid; in srp_new_ib_cm_id()
[all …]
/linux/arch/sparc/include/asm/
H A Dchafsr.h9 * ch --> cheetah
10 * ch+ --> cheetah plus
26 #define CHPAFSR_DTO (1UL << 59UL) /* ch+ */
31 #define CHPAFSR_DBERR (1UL << 58UL) /* ch+ */
34 #define CHPAFSR_THCE (1UL << 57UL) /* ch+ */
39 #define CHPAFSR_TSCE (1UL << 56UL) /* ch+ */
44 #define CHPAFSR_TUE (1UL << 55UL) /* ch+ */
51 #define CHPAFSR_DUE (1UL << 54UL) /* ch+ */
69 #define CHAFSR_ME (1UL << 53UL) /* ch,ch+,jp */
74 #define CHAFSR_PRIV (1UL << 52UL) /* ch,ch+,jp */
[all …]
/linux/drivers/tty/serial/jsm/
H A Djsm_tty.c25 static void jsm_carrier(struct jsm_channel *ch);
27 static inline int jsm_get_mstat(struct jsm_channel *ch) in jsm_get_mstat() argument
32 jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "start\n"); in jsm_get_mstat()
34 mstat = (ch->ch_mostat | ch->ch_mistat); in jsm_get_mstat()
51 jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n"); in jsm_get_mstat()
148 static void jsm_tty_send_xchar(struct uart_port *port, char ch) in jsm_tty_send_xchar() argument
157 if (ch == termios->c_cc[VSTART]) in jsm_tty_send_xchar()
160 if (ch == termios->c_cc[VSTOP]) in jsm_tty_send_xchar()
370 struct jsm_channel *ch; in jsm_tty_init() local
403 ch = brd->channels[0]; in jsm_tty_init()
[all …]
/linux/drivers/counter/
H A Drz-mtu3-cnt.c70 * @ch: HW channels for the counters
78 struct rz_mtu3_channel *ch; member
102 return &priv->ch[ch_id]; in rz_mtu3_get_ch()
110 pm_runtime_get_sync(priv->ch->dev); in rz_mtu3_is_counter_invalid()
111 tmdr = rz_mtu3_shared_reg_read(priv->ch, RZ_MTU3_TMDR3); in rz_mtu3_is_counter_invalid()
112 pm_runtime_put(priv->ch->dev); in rz_mtu3_is_counter_invalid()
124 struct rz_mtu3_channel *const ch, in rz_mtu3_lock_if_counter_is_valid() argument
130 if (ch->is_busy && !priv->count_is_enabled[id]) { in rz_mtu3_lock_if_counter_is_valid()
143 static int rz_mtu3_lock_if_count_is_enabled(struct rz_mtu3_channel *const ch, in rz_mtu3_lock_if_count_is_enabled() argument
149 if (ch->is_busy && !priv->count_is_enabled[id]) { in rz_mtu3_lock_if_count_is_enabled()
[all …]
/linux/drivers/dma/dw-edma/
H A Ddw-hdma-v0-debugfs.c28 __ch_regs = REGS_ADDR(dw, ch[_ch].rd); \
30 __ch_regs = REGS_ADDR(dw, ch[_ch].wr); \
35 #define CTX_REGISTER(dw, name, dir, ch) \ argument
36 {#name, REGS_CH_ADDR(dw, name, dir, ch)}
80 u16 ch, struct dentry *dent) in dw_hdma_debugfs_regs_ch() argument
83 CTX_REGISTER(dw, ch_en, dir, ch), in dw_hdma_debugfs_regs_ch()
84 CTX_REGISTER(dw, doorbell, dir, ch), in dw_hdma_debugfs_regs_ch()
85 CTX_REGISTER(dw, prefetch, dir, ch), in dw_hdma_debugfs_regs_ch()
86 CTX_REGISTER(dw, handshake, dir, ch), in dw_hdma_debugfs_regs_ch()
87 CTX_REGISTER(dw, llp.lsb, dir, ch), in dw_hdma_debugfs_regs_ch()
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/linux/drivers/staging/most/dim2/
H A Dhal.c399 u16 dim_dbr_space(struct dim_channel *ch) in dim_dbr_space() argument
404 if (ch->addr != dbr->ch_addr) in dim_dbr_space()
407 cur_rpc = dim2_rpc(ch->addr); in dim_dbr_space()
598 static void isoc_init(struct dim_channel *ch, u8 ch_addr, u16 packet_length) in isoc_init() argument
600 state_init(&ch->state); in isoc_init()
602 ch->addr = ch_addr; in isoc_init()
604 ch->packet_length = packet_length; in isoc_init()
605 ch->bytes_per_frame = 0; in isoc_init()
606 ch->done_sw_buffers_number = 0; in isoc_init()
609 static void sync_init(struct dim_channel *ch, u8 ch_addr, u16 bytes_per_frame) in sync_init() argument
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