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/linux/drivers/net/wireless/broadcom/brcm80211/brcmutil/
H A Dd11.c41 static void brcmu_d11n_encchspec(struct brcmu_chan *ch) in brcmu_d11n_encchspec() argument
43 if (ch->bw == BRCMU_CHAN_BW_20) in brcmu_d11n_encchspec()
44 ch->sb = BRCMU_CHAN_SB_NONE; in brcmu_d11n_encchspec()
46 ch->chspec = 0; in brcmu_d11n_encchspec()
47 brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_CH_MASK, in brcmu_d11n_encchspec()
48 BRCMU_CHSPEC_CH_SHIFT, ch->chnum); in brcmu_d11n_encchspec()
49 brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11N_SB_MASK, in brcmu_d11n_encchspec()
50 0, d11n_sb(ch->sb)); in brcmu_d11n_encchspec()
51 brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11N_BW_MASK, in brcmu_d11n_encchspec()
52 0, d11n_bw(ch->bw)); in brcmu_d11n_encchspec()
[all …]
/linux/drivers/misc/sgi-xp/
H A Dxpc_channel.c27 xpc_process_connect(struct xpc_channel *ch, unsigned long *irq_flags) in xpc_process_connect() argument
31 lockdep_assert_held(&ch->lock); in xpc_process_connect()
33 if (!(ch->flags & XPC_C_OPENREQUEST) || in xpc_process_connect()
34 !(ch->flags & XPC_C_ROPENREQUEST)) { in xpc_process_connect()
38 DBUG_ON(!(ch->flags & XPC_C_CONNECTING)); in xpc_process_connect()
40 if (!(ch->flags & XPC_C_SETUP)) { in xpc_process_connect()
41 spin_unlock_irqrestore(&ch->lock, *irq_flags); in xpc_process_connect()
42 ret = xpc_arch_ops.setup_msg_structures(ch); in xpc_process_connect()
43 spin_lock_irqsave(&ch->lock, *irq_flags); in xpc_process_connect()
46 XPC_DISCONNECT_CHANNEL(ch, ret, irq_flags); in xpc_process_connect()
[all …]
H A Dxpc_uv.c645 /* ??? Is holding a spin_lock (ch->lock) during this call a bad idea? */ in xpc_send_activate_IRQ_uv()
670 xpc_send_activate_IRQ_ch_uv(struct xpc_channel *ch, unsigned long *irq_flags, in xpc_send_activate_IRQ_ch_uv() argument
673 struct xpc_partition *part = &xpc_partitions[ch->partid]; in xpc_send_activate_IRQ_ch_uv()
679 spin_unlock_irqrestore(&ch->lock, *irq_flags); in xpc_send_activate_IRQ_ch_uv()
684 spin_lock_irqsave(&ch->lock, *irq_flags); in xpc_send_activate_IRQ_ch_uv()
999 xpc_allocate_send_msg_slot_uv(struct xpc_channel *ch) in xpc_allocate_send_msg_slot_uv() argument
1001 struct xpc_channel_uv *ch_uv = &ch->sn.uv; in xpc_allocate_send_msg_slot_uv()
1008 for (nentries = ch->local_nentries; nentries > 0; nentries--) { in xpc_allocate_send_msg_slot_uv()
1022 spin_lock_irqsave(&ch->lock, irq_flags); in xpc_allocate_send_msg_slot_uv()
1023 if (nentries < ch->local_nentries) in xpc_allocate_send_msg_slot_uv()
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dpio_phy_regs.h13 #define _VLV_PLL(ch, dw) (0x8000 + (ch) * 0x20 + (dw) * 4) /* dw 0-7,16-23 */ argument
14 #define _CHV_PLL(ch, dw) (0x8000 + (ch) * 0x180 + (dw) * 4) argument
16 #define _VLV_PCS(ch, spline, dw) (0x200 + (ch) * 0x2400 + (spline) * 0x200 + (dw) * 4) argument
17 #define _VLV_PCS_GRP(ch, dw) (0x8200 + (ch) * 0x200 + (dw) * 4) argument
19 #define _VLV_TX(ch, lane, dw) (0x80 + (ch) * 0x2400 + (lane) * 0x200 + (dw) * 4) argument
20 #define _VLV_TX_GRP(ch, dw) (0x8280 + (ch) * 0x200 + (dw) * 4) argument
26 #define VLV_PLL_DW3(ch) _VLV_PLL((ch), 3) argument
47 #define VLV_PLL_DW5(ch) _VLV_PLL((ch), 5) argument
55 #define VLV_PLL_DW7(ch) _VLV_PLL((ch), 7) argument
57 #define VLV_PLL_DW16(ch) _VLV_PLL((ch), 16) argument
[all …]
H A Dbxt_dpio_phy_regs.h23 #define _BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \ argument
24 (BXT_PHY_BASE(phy) + _PIPE((ch), (reg_ch0) - _BXT_PHY0_BASE, \
26 #define _MMIO_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \ argument
27 _MMIO(_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1))
30 #define _MMIO_BXT_PHY_CH_LN(phy, ch, lane, reg_ch0, reg_ch1) \ argument
31 _MMIO(_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) + _BXT_LANE_OFFSET(lane))
51 #define BXT_PORT_PLL_EBB_0(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
60 #define BXT_PORT_PLL_EBB_4(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
95 #define _PORT_PLL_BASE(phy, ch) _BXT_PHY_CH(phy, ch, \ argument
98 #define BXT_PORT_PLL(phy, ch, idx) _MMIO(_PORT_PLL_BASE(phy, ch) + \ argument
[all …]
/linux/drivers/clocksource/
H A Dsh_cmt.c241 static inline u32 sh_cmt_read_cmstr(struct sh_cmt_channel *ch) in sh_cmt_read_cmstr() argument
243 if (ch->iostart) in sh_cmt_read_cmstr()
244 return ch->cmt->info->read_control(ch->iostart, 0); in sh_cmt_read_cmstr()
246 return ch->cmt->info->read_control(ch->cmt->mapbase, 0); in sh_cmt_read_cmstr()
249 static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch, u32 value) in sh_cmt_write_cmstr() argument
251 u32 old_value = sh_cmt_read_cmstr(ch); in sh_cmt_write_cmstr()
254 if (ch->iostart) { in sh_cmt_write_cmstr()
255 ch->cmt->info->write_control(ch->iostart, 0, value); in sh_cmt_write_cmstr()
256 udelay(ch->cmt->reg_delay); in sh_cmt_write_cmstr()
258 ch->cmt->info->write_control(ch->cmt->mapbase, 0, value); in sh_cmt_write_cmstr()
[all …]
H A Dsh_tmu.c84 static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr) in sh_tmu_read() argument
89 switch (ch->tmu->model) { in sh_tmu_read()
91 return ioread8(ch->tmu->mapbase + 2); in sh_tmu_read()
93 return ioread8(ch->tmu->mapbase + 4); in sh_tmu_read()
100 return ioread16(ch->base + offs); in sh_tmu_read()
102 return ioread32(ch->base + offs); in sh_tmu_read()
105 static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr, in sh_tmu_write() argument
111 switch (ch->tmu->model) { in sh_tmu_write()
113 return iowrite8(value, ch->tmu->mapbase + 2); in sh_tmu_write()
115 return iowrite8(value, ch->tmu->mapbase + 4); in sh_tmu_write()
[all …]
H A Dsh_mtu2.c156 static inline unsigned long sh_mtu2_read(struct sh_mtu2_channel *ch, int reg_nr) in sh_mtu2_read() argument
161 return ioread8(ch->mtu->mapbase + 0x280); in sh_mtu2_read()
166 return ioread16(ch->base + offs); in sh_mtu2_read()
168 return ioread8(ch->base + offs); in sh_mtu2_read()
171 static inline void sh_mtu2_write(struct sh_mtu2_channel *ch, int reg_nr, in sh_mtu2_write() argument
177 return iowrite8(value, ch->mtu->mapbase + 0x280); in sh_mtu2_write()
182 iowrite16(value, ch->base + offs); in sh_mtu2_write()
184 iowrite8(value, ch->base + offs); in sh_mtu2_write()
187 static void sh_mtu2_start_stop_ch(struct sh_mtu2_channel *ch, int start) in sh_mtu2_start_stop_ch() argument
192 raw_spin_lock_irqsave(&ch->mtu->lock, flags); in sh_mtu2_start_stop_ch()
[all …]
/linux/drivers/gpu/drm/imx/dcss/
H A Ddcss-dpr.c118 struct dcss_dpr_ch ch[3]; member
121 static void dcss_dpr_write(struct dcss_dpr_ch *ch, u32 val, u32 ofs) in dcss_dpr_write() argument
123 struct dcss_dpr *dpr = ch->dpr; in dcss_dpr_write()
125 dcss_ctxld_write(dpr->ctxld, dpr->ctx_id, val, ch->base_ofs + ofs); in dcss_dpr_write()
130 struct dcss_dpr_ch *ch; in dcss_dpr_ch_init_all() local
134 ch = &dpr->ch[i]; in dcss_dpr_ch_init_all()
136 ch->base_ofs = dpr_base + i * 0x1000; in dcss_dpr_ch_init_all()
138 ch->base_reg = devm_ioremap(dpr->dev, ch->base_ofs, SZ_4K); in dcss_dpr_ch_init_all()
139 if (!ch->base_reg) { in dcss_dpr_ch_init_all()
140 dev_err(dpr->dev, "dpr: unable to remap ch %d base\n", in dcss_dpr_ch_init_all()
[all …]
/linux/drivers/dma/
H A Dmoxart-dma.c180 struct moxart_chan *ch = to_moxart_dma_chan(chan); in moxart_terminate_all() local
185 dev_dbg(chan2dev(chan), "%s: ch=%p\n", __func__, ch); in moxart_terminate_all()
187 spin_lock_irqsave(&ch->vc.lock, flags); in moxart_terminate_all()
189 if (ch->desc) { in moxart_terminate_all()
190 moxart_dma_desc_free(&ch->desc->vd); in moxart_terminate_all()
191 ch->desc = NULL; in moxart_terminate_all()
194 ctrl = readl(ch->base + REG_OFF_CTRL); in moxart_terminate_all()
196 writel(ctrl, ch->base + REG_OFF_CTRL); in moxart_terminate_all()
198 vchan_get_all_descriptors(&ch->vc, &head); in moxart_terminate_all()
199 spin_unlock_irqrestore(&ch->vc.lock, flags); in moxart_terminate_all()
[all …]
/linux/drivers/scsi/
H A Dch.c87 #define ch_printk(prefix, ch, fmt, a...) \ argument
88 sdev_prefix_printk(prefix, (ch)->device, (ch)->name, fmt, ##a)
93 ch_printk(KERN_DEBUG, ch, fmt, ##arg); \
98 ch_printk(level, ch, fmt, ##arg); \
187 ch_do_scsi(scsi_changer *ch, unsigned char *cmd, int cmd_len, in ch_do_scsi() argument
213 result = scsi_execute_cmd(ch->device, cmd, op, buffer, buflength, in ch_do_scsi()
219 scsi_print_sense_hdr(ch->device, ch->name, &sshdr); in ch_do_scsi()
228 ch_elem_to_typecode(scsi_changer *ch, u_int elem) in ch_elem_to_typecode() argument
233 if (elem >= ch->firsts[i] && in ch_elem_to_typecode()
234 elem < ch->firsts[i] + in ch_elem_to_typecode()
[all …]
/linux/drivers/s390/net/
H A Dctcm_main.c71 * ch The channel where this skb has been received.
74 void ctcm_unpack_skb(struct channel *ch, struct sk_buff *pskb) in ctcm_unpack_skb() argument
76 struct net_device *dev = ch->netdev; in ctcm_unpack_skb()
90 if ((ch->protocol == CTCM_PROTO_S390) && in ctcm_unpack_skb()
92 if (!(ch->logflags & LOG_FLAG_ILLEGALPKT)) { in ctcm_unpack_skb()
93 ch->logflags |= LOG_FLAG_ILLEGALPKT; in ctcm_unpack_skb()
112 if (!(ch->logflags & LOG_FLAG_ILLEGALSIZE)) { in ctcm_unpack_skb()
118 ch->logflags |= LOG_FLAG_ILLEGALSIZE; in ctcm_unpack_skb()
129 if (!(ch->logflags & LOG_FLAG_OVERRUN)) { in ctcm_unpack_skb()
134 ch->logflags |= LOG_FLAG_OVERRUN; in ctcm_unpack_skb()
[all …]
H A Dctcm_mpc.c107 static void ctcmpc_unpack_skb(struct channel *ch, struct sk_buff *pskb);
273 ctcm_pr_debug("th->ch : %02x\n", header->th_ch_flag); in ctcmpc_dump_skb()
611 struct channel *rch = mpcginfo->ch; in mpc_rcvd_sweep_resp()
615 struct channel *ch = priv->channel[CTCM_WRITE]; in mpc_rcvd_sweep_resp() local
617 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, ch, ch->id); in mpc_rcvd_sweep_resp()
624 fsm_deltimer(&ch->sweep_timer); in mpc_rcvd_sweep_resp()
627 ch->th_seq_num = 0x00; in mpc_rcvd_sweep_resp()
646 struct channel *ch = priv->channel[CTCM_WRITE]; in ctcmpc_send_sweep_resp() local
648 CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, rch, rch->id); in ctcmpc_send_sweep_resp()
660 header->sw.th_last_seq = ch->th_seq_num; in ctcmpc_send_sweep_resp()
[all …]
/linux/drivers/video/fbdev/
H A Dsh_mobile_lcdcfb.c213 struct sh_mobile_lcdc_chan ch[2]; member
398 struct sh_mobile_lcdc_chan *ch = handle; in lcdc_sys_write_index() local
400 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT); in lcdc_sys_write_index()
401 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); in lcdc_sys_write_index()
402 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA | in lcdc_sys_write_index()
403 (lcdc_chan_is_sublcd(ch) ? 2 : 0)); in lcdc_sys_write_index()
404 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); in lcdc_sys_write_index()
409 struct sh_mobile_lcdc_chan *ch = handle; in lcdc_sys_write_data() local
411 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW); in lcdc_sys_write_data()
412 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); in lcdc_sys_write_data()
[all …]
/linux/drivers/rapidio/
H A Drio_cm.c222 static int riocm_ch_close(struct rio_channel *ch);
244 static int riocm_cmp(struct rio_channel *ch, enum rio_cm_state cmp) in riocm_cmp() argument
248 spin_lock_bh(&ch->lock); in riocm_cmp()
249 ret = (ch->state == cmp); in riocm_cmp()
250 spin_unlock_bh(&ch->lock); in riocm_cmp()
254 static int riocm_cmp_exch(struct rio_channel *ch, in riocm_cmp_exch() argument
259 spin_lock_bh(&ch->lock); in riocm_cmp_exch()
260 ret = (ch->state == cmp); in riocm_cmp_exch()
262 ch->state = exch; in riocm_cmp_exch()
263 spin_unlock_bh(&ch->lock); in riocm_cmp_exch()
[all …]
/linux/sound/soc/codecs/
H A Drk3308_codec.h24 #define RK3308_ADC_DIG_OFFSET(ch) (((ch) & 0x3) * 0xc0 + 0x0) argument
26 #define RK3308_ADC_DIG_CON01(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x04) argument
27 #define RK3308_ADC_DIG_CON02(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x08) argument
28 #define RK3308_ADC_DIG_CON03(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x0c) argument
29 #define RK3308_ADC_DIG_CON04(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x10) argument
30 #define RK3308_ADC_DIG_CON05(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x14) // ver.C only argument
31 #define RK3308_ADC_DIG_CON06(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x18) // ver.C only argument
32 #define RK3308_ADC_DIG_CON07(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x1c) argument
34 #define RK3308_ALC_L_DIG_CON00(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x40) argument
35 #define RK3308_ALC_L_DIG_CON01(ch) (RK3308_ADC_DIG_OFFSET((ch)) + 0x44) argument
[all …]
H A Didt821034.c38 } ch[IDT821034_NB_CHANNEL]; member
44 } ch[IDT821034_NB_CHANNEL]; member
119 static int idt821034_set_channel_power(struct idt821034 *idt821034, u8 ch, u8 power) in idt821034_set_channel_power() argument
124 dev_dbg(&idt821034->spi->dev, "set_channel_power(%u, 0x%x)\n", ch, power); in idt821034_set_channel_power()
126 conf = IDT821034_MODE_CODEC(ch) | idt821034->cache.codec_conf; in idt821034_set_channel_power()
131 idt821034->cache.ch[ch].rx_slot); in idt821034_set_channel_power()
138 idt821034->cache.ch[ch].tx_slot); in idt821034_set_channel_power()
148 idt821034->cache.ch[ch].power = power; in idt821034_set_channel_power()
153 static u8 idt821034_get_channel_power(struct idt821034 *idt821034, u8 ch) in idt821034_get_channel_power() argument
155 return idt821034->cache.ch[ch].power; in idt821034_get_channel_power()
[all …]
/linux/drivers/mailbox/
H A Dmtk-gpueb-mailbox.c38 struct mtk_gpueb_mbox_chan *ch; member
94 struct mtk_gpueb_mbox_chan *ch = data; in mtk_gpueb_mbox_isr() local
97 rx_sts = readl(ch->ebm->mbox_ctl + GPUEB_MBOX_CTL_RX_STS); in mtk_gpueb_mbox_isr()
99 if (rx_sts & BIT(ch->num)) { in mtk_gpueb_mbox_isr()
100 if (!atomic_cmpxchg(&ch->rx_status, 0, GPUEB_MBOX_FULL | GPUEB_MBOX_BLOCKED)) in mtk_gpueb_mbox_isr()
109 struct mtk_gpueb_mbox_chan *ch = data; in mtk_gpueb_mbox_thread() local
112 status = atomic_cmpxchg(&ch->rx_status, GPUEB_MBOX_FULL | GPUEB_MBOX_BLOCKED, in mtk_gpueb_mbox_thread()
117 mtk_gpueb_mbox_read_rx(buf, ch); in mtk_gpueb_mbox_thread()
118 writel(BIT(ch->num), ch->ebm->mbox_ctl + GPUEB_MBOX_CTL_IRQ_CLR); in mtk_gpueb_mbox_thread()
119 mbox_chan_received_data(&ch->ebm->mbox.chans[ch->num], buf); in mtk_gpueb_mbox_thread()
[all …]
/linux/drivers/infiniband/ulp/srp/
H A Dib_srp.c305 static int srp_new_ib_cm_id(struct srp_rdma_ch *ch) in srp_new_ib_cm_id() argument
307 struct srp_target_port *target = ch->target; in srp_new_ib_cm_id()
311 srp_ib_cm_handler, ch); in srp_new_ib_cm_id()
315 if (ch->ib_cm.cm_id) in srp_new_ib_cm_id()
316 ib_destroy_cm_id(ch->ib_cm.cm_id); in srp_new_ib_cm_id()
317 ch->ib_cm.cm_id = new_cm_id; in srp_new_ib_cm_id()
320 ch->ib_cm.path.rec_type = SA_PATH_REC_TYPE_OPA; in srp_new_ib_cm_id()
322 ch->ib_cm.path.rec_type = SA_PATH_REC_TYPE_IB; in srp_new_ib_cm_id()
323 ch->ib_cm.path.sgid = target->sgid; in srp_new_ib_cm_id()
324 ch->ib_cm.path.dgid = target->ib_cm.orig_dgid; in srp_new_ib_cm_id()
[all …]
/linux/arch/sparc/include/asm/
H A Dchafsr.h9 * ch --> cheetah
10 * ch+ --> cheetah plus
26 #define CHPAFSR_DTO (1UL << 59UL) /* ch+ */
31 #define CHPAFSR_DBERR (1UL << 58UL) /* ch+ */
34 #define CHPAFSR_THCE (1UL << 57UL) /* ch+ */
39 #define CHPAFSR_TSCE (1UL << 56UL) /* ch+ */
44 #define CHPAFSR_TUE (1UL << 55UL) /* ch+ */
51 #define CHPAFSR_DUE (1UL << 54UL) /* ch+ */
69 #define CHAFSR_ME (1UL << 53UL) /* ch,ch+,jp */
74 #define CHAFSR_PRIV (1UL << 52UL) /* ch,ch+,jp */
[all …]
/linux/drivers/tty/serial/jsm/
H A Djsm_tty.c25 static void jsm_carrier(struct jsm_channel *ch);
27 static inline int jsm_get_mstat(struct jsm_channel *ch) in jsm_get_mstat() argument
32 jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "start\n"); in jsm_get_mstat()
34 mstat = (ch->ch_mostat | ch->ch_mistat); in jsm_get_mstat()
51 jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n"); in jsm_get_mstat()
148 static void jsm_tty_send_xchar(struct uart_port *port, char ch) in jsm_tty_send_xchar() argument
157 if (ch == termios->c_cc[VSTART]) in jsm_tty_send_xchar()
160 if (ch == termios->c_cc[VSTOP]) in jsm_tty_send_xchar()
370 struct jsm_channel *ch; in jsm_tty_init() local
403 ch = brd->channels[0]; in jsm_tty_init()
[all …]
/linux/drivers/dma/dw-edma/
H A Ddw-hdma-v0-debugfs.c28 __ch_regs = REGS_ADDR(dw, ch[_ch].rd); \
30 __ch_regs = REGS_ADDR(dw, ch[_ch].wr); \
35 #define CTX_REGISTER(dw, name, dir, ch) \ argument
36 {#name, REGS_CH_ADDR(dw, name, dir, ch)}
80 u16 ch, struct dentry *dent) in dw_hdma_debugfs_regs_ch() argument
83 CTX_REGISTER(dw, ch_en, dir, ch), in dw_hdma_debugfs_regs_ch()
84 CTX_REGISTER(dw, doorbell, dir, ch), in dw_hdma_debugfs_regs_ch()
85 CTX_REGISTER(dw, prefetch, dir, ch), in dw_hdma_debugfs_regs_ch()
86 CTX_REGISTER(dw, handshake, dir, ch), in dw_hdma_debugfs_regs_ch()
87 CTX_REGISTER(dw, llp.lsb, dir, ch), in dw_hdma_debugfs_regs_ch()
[all …]
/linux/drivers/media/platform/ti/davinci/
H A Dvpif_display.c54 static void vpif_calculate_offsets(struct channel_obj *ch);
55 static void vpif_config_addr(struct channel_obj *ch, int muxmode);
74 struct channel_obj *ch = vb2_get_drv_priv(vb->vb2_queue); in vpif_buffer_prepare() local
77 common = &ch->common[VPIF_VIDEO_INDEX]; in vpif_buffer_prepare()
115 struct channel_obj *ch = vb2_get_drv_priv(vq); in vpif_buffer_queue_setup() local
116 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX]; in vpif_buffer_queue_setup()
133 vpif_calculate_offsets(ch); in vpif_buffer_queue_setup()
148 struct channel_obj *ch = vb2_get_drv_priv(vb->vb2_queue); in vpif_buffer_queue() local
152 common = &ch->common[VPIF_VIDEO_INDEX]; in vpif_buffer_queue()
169 struct channel_obj *ch = vb2_get_drv_priv(vq); in vpif_start_streaming() local
[all …]
/linux/drivers/clk/berlin/
H A Dberlin2-avpll.c214 struct berlin2_avpll_channel *ch = to_avpll_channel(hw); in berlin2_avpll_channel_is_enabled() local
217 if (ch->index == 7) in berlin2_avpll_channel_is_enabled()
220 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_is_enabled()
221 reg &= VCO_POWERUP_CH1 << ch->index; in berlin2_avpll_channel_is_enabled()
228 struct berlin2_avpll_channel *ch = to_avpll_channel(hw); in berlin2_avpll_channel_enable() local
231 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_enable()
232 reg |= VCO_POWERUP_CH1 << ch->index; in berlin2_avpll_channel_enable()
233 writel_relaxed(reg, ch->base + VCO_CTRL10); in berlin2_avpll_channel_enable()
240 struct berlin2_avpll_channel *ch = to_avpll_channel(hw); in berlin2_avpll_channel_disable() local
243 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_disable()
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/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpaa2-xsk.c13 struct dpaa2_eth_channel *ch, in dpaa2_eth_setup_consume_func() argument
25 if (fq->channel != ch) in dpaa2_eth_setup_consume_func()
33 struct dpaa2_eth_channel *ch, in dpaa2_xsk_run_xdp() argument
44 xdp_prog = READ_ONCE(ch->xdp.prog); in dpaa2_xsk_run_xdp()
49 ch->xsk_pool->umem->headroom); in dpaa2_xsk_run_xdp()
56 xdp_buff->rxq = &ch->xdp_rxq; in dpaa2_xsk_run_xdp()
68 ch->stats.xdp_drop++; in dpaa2_xsk_run_xdp()
69 dpaa2_eth_recycle_buf(priv, ch, addr); in dpaa2_xsk_run_xdp()
71 ch->buf_count--; in dpaa2_xsk_run_xdp()
72 ch->stats.xdp_redirect++; in dpaa2_xsk_run_xdp()
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