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/linux/arch/mips/boot/dts/img/
H A Dpistachio.dtsi455 spim0_cs4_pin: spim0-cs4-pin {
456 spim0-cs4 {
462 spim0_cs4_alt_pin: spim0-cs4-alt-pin {
463 spim0-cs4 {
541 spim1_cs4_pin: spim1-cs4-pin {
542 spim1-cs4 {
/linux/tools/testing/selftests/drivers/net/ocelot/
H A Dbasic_qos.sh227 dcb app add dev ${swp1} dscp-prio CS4:4
229 dcb app del dev ${swp1} dscp-prio CS4:4
/linux/Documentation/devicetree/bindings/bus/
H A Dnvidia,tegra20-gmi.txt74 chip-select (CS4), in this example external address decoding is provided:
109 on CS4:
H A Dqcom,ebi2.yaml35 CS4 GPIO132 0x1c800000-0x1d000000 (8MB)
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-xp-pinctrl.txt68 mpp44 44 gpio, uart2(cts), uart3(rxd), spi0(cs4), pcie(clkreq2),
69 dram(bat), spi1(cs4)
/linux/arch/m68k/include/asm/
H A Dm5272sim.h54 #define MCFSIM_CSBR4 (MCF_MBAR + 0x60) /* CS4 Base Address */
55 #define MCFSIM_CSOR4 (MCF_MBAR + 0x64) /* CS4 Option */
/linux/arch/sh/include/mach-common/mach/
H A Dsh7785lcr.h16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
H A Durquell.h14 * CS4 | PCIe
/linux/arch/arm/boot/dts/marvell/
H A Darmada-370-xp.dtsi273 <MBUS_ID(0x01, 0x1f) 0 0xffffffff>, /* CS4 */
291 <MBUS_ID(0x01, 0x1b) 0 0xffffffff>, /* CS4 */
/linux/drivers/bus/
H A Dqcom-ebi2.c26 * CS0, CS1, CS4 and CS5 are two bits wide, CS2 and CS3 are one bit.
140 /* CS4 */
/linux/Documentation/devicetree/bindings/spi/
H A Dspi-orion.txt54 <MBUS_ID(0x01, 0x1f) 0 0xffffffff>, /* CS4 */
/linux/arch/sh/boards/
H A Dboard-edosk7760.c23 /* Bus state controller registers for CS4 area */
H A Dboard-urquell.c45 * 0x10000000 - 0x14000000 (CS4) PCIe
H A Dboard-magicpanelr2.c71 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ in setup_chip_select()
/linux/arch/arm/mach-imx/
H A Dmx3x.h27 * F4000000 B4000000 32M CS4
/linux/drivers/pinctrl/
H A Dpinctrl-ingenic.c226 INGENIC_PIN_GROUP("nand-cs4", jz4730_nand_cs4, 1),
241 "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4", "nand-cs5",
321 INGENIC_PIN_GROUP("nand-cs4", jz4740_nand_cs4, 0),
340 "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4", "nand-fre-fwe",
426 INGENIC_PIN_GROUP("nand-cs4", jz4725b_nand_cs4, 0),
445 "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4",
553 INGENIC_PIN_GROUP("nand-cs4", jz4750_nand_cs4, 0),
578 "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4", "nand-fre-fwe",
713 INGENIC_PIN_GROUP("nand-cs4", jz4755_nand_cs4, 0),
743 "nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4", "nand-fre-fwe",
[all …]
/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-gateworks-gw2348.dts106 * FIXME: Latch LEDs or extra UARTs at CS4
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx27-phytec-phycore-rdk.dts201 MX27_PAD_CS4_B__CS4_B 0x0 /* CS4 */
/linux/sound/soc/fsl/
H A Dfsl_easrc.c156 SOC_SINGLE_REG_RW("Context 0 IEC958 CS4", REG_EASRC_CS4(0)),
157 SOC_SINGLE_REG_RW("Context 1 IEC958 CS4", REG_EASRC_CS4(1)),
158 SOC_SINGLE_REG_RW("Context 2 IEC958 CS4", REG_EASRC_CS4(2)),
159 SOC_SINGLE_REG_RW("Context 3 IEC958 CS4", REG_EASRC_CS4(3)),
/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-xp.c263 MPP_VAR_FUNCTION(0x3, "spi0", "cs4", V_MV78230_PLUS),
266 MPP_VAR_FUNCTION(0x6, "spi1", "cs4", V_MV78230_PLUS)),
/linux/drivers/pinctrl/renesas/
H A Dpfc-shx3.c390 GPIO_FN(CS4),
/linux/arch/sh/boards/mach-kfr2r09/
H A Dsetup.c504 /* setup NAND flash at CS4 */ in kfr2r09_devices_setup()
/linux/arch/sh/boards/mach-migor/
H A Dsetup.c465 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */ in migor_devices_setup()
/linux/net/sched/
H A Dsch_cake.c2347 * Precedence Class 4 (CS4)
2366 * Realtime Interactive (CS4) - eg. games
2383 * Minimum Latency (EF, VA, CS5, CS4) in cake_config_diffserv8()
2430 * Latency Sensitive (CS7, CS6, EF, VA, CS5, CS4) in cake_config_diffserv4()
/linux/arch/powerpc/boot/dts/
H A Dxcalibur1501.dts74 4 0 0 0xe9000000 0x100000>; /* CS4: USB */

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