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/linux/tools/memory-model/Documentation/
H A Dlocking.txt32 void CPU0(void)
48 The basic rule guarantees that if CPU0() acquires mylock before CPU1(),
64 void CPU0(void)
80 This converse to the basic rule guarantees that if CPU0() acquires
99 void CPU0(void)
113 /* CPU1() is the exactly the same as CPU0(). */
124 void CPU0(void)
138 /* CPU1() is the exactly the same as CPU0(). */
160 void CPU0(void)
193 void CPU0(void)
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H A Drecipes.txt77 void CPU0(void)
93 The basic rule guarantees that if CPU0() acquires mylock before CPU1(),
103 void CPU0(void)
119 This converse to the basic rule guarantees that if CPU0() acquires
134 void CPU0(void)
167 void CPU0(void)
224 void CPU0(void)
259 void CPU0(void)
300 void CPU0(void)
368 void CPU0(void)
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/linux/tools/power/x86/turbostat/
H A Dturbostat.8337 cpu0: MSR_PM_ENABLE: 0x00000001 (HWP)
338 cpu0: MSR_HWP_CAPABILITIES: 0x01101f53 (high 83 guar 31 eff 16 low 1)
339 cpu0: MSR_HWP_REQUEST: 0x00005353 (min 83 max 83 des 0 epp 0x0 window 0x0 pkg 0x0)
340 cpu0: MSR_HWP_INTERRUPT: 0x00000001 (EN_Guaranteed_Perf_Change, Dis_Excursion_Min)
341 cpu0: MSR_HWP_STATUS: 0x00000004 (No-Guaranteed_Perf_Change, No-Excursion_Min)
342 cpu0: EPB: 6 (balanced)
343 cpu0: MSR_RAPL_POWER_UNIT: 0x000a0e03 (0.125000 Watts, 0.000061 Joules, 0.000977 sec.)
344 cpu0: MSR_PKG_POWER_INFO: 0x00000168 (45 W TDP, RAPL 0 - 0 W, 0.000000 sec.)
345 cpu0: MSR_PKG_POWER_LIMIT: 0x42820800218208 (UNlocked)
346 cpu0: PKG Limit #1: ENabled (65.000 Watts, 64.000000 sec, clamp ENabled)
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-odroidhc1.dts33 cpu0_thermal: cpu0-thermal {
61 cooling-device = <&cpu0 0 2>,
77 cooling-device = <&cpu0 3 8>,
110 cooling-device = <&cpu0 0 2>,
121 cooling-device = <&cpu0 3 8>,
154 cooling-device = <&cpu0 0 2>,
165 cooling-device = <&cpu0 3 8>,
198 cooling-device = <&cpu0 0 2>,
209 cooling-device = <&cpu0 3 8>,
H A Dexynos5420-arndale-octa.dts68 &cpu0 {
107 cooling-device = <&cpu0 0 2>,
123 cooling-device = <&cpu0 3 6>,
139 cooling-device = <&cpu0 6 11>,
178 cooling-device = <&cpu0 0 2>,
190 cooling-device = <&cpu0 3 6>,
202 cooling-device = <&cpu0 6 11>,
241 cooling-device = <&cpu0 0 2>,
253 cooling-device = <&cpu0 3 6>,
265 cooling-device = <&cpu0 6 11>,
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H A Dexynos5422-odroidxu3-lite.dts52 cooling-device = <&cpu0 3 7>,
63 cooling-device = <&cpu0 3 7>,
74 cooling-device = <&cpu0 3 7>,
85 cooling-device = <&cpu0 3 7>,
H A Dexynos5422-odroidxu3-common.dtsi56 cpu0_thermal: cpu0-thermal {
112 cooling-device = <&cpu0 0 2>,
128 cooling-device = <&cpu0 3 8>,
190 cooling-device = <&cpu0 0 2>,
201 cooling-device = <&cpu0 3 8>,
263 cooling-device = <&cpu0 0 2>,
274 cooling-device = <&cpu0 3 8>,
336 cooling-device = <&cpu0 0 2>,
347 cooling-device = <&cpu0 3 8>,
/linux/Documentation/translations/zh_CN/scheduler/
H A Dsched-capacity.rst61 - work_per_hz(CPU0) = W
67 - capacity(CPU0) = C
74 CPU0 work ^
93 - max_freq(CPU0) = F
98 - capacity(CPU0) = C
103 CPU0 work ^
174 - capacity(CPU0) = C
179 CPU0 work ^
336 capacity(CPU0) = C
339 workload on CPU0
H A Dsched-energy.rst152 CPU0 CPU1 CPU2 CPU3
167 768 ============= * CPU0: 200 / 341 * 150 = 88
177 CPU0 CPU1 CPU2 CPU3
185 768 ============= * CPU0: 200 / 341 * 150 = 88
195 CPU0 CPU1 CPU2 CPU3
197 **情况3. P依旧留在prev_cpu/CPU0**::
202 768 ============= * CPU0: 400 / 512 * 300 = 234
212 CPU0 CPU1 CPU2 CPU3
/linux/Documentation/scheduler/
H A Dsched-capacity.rst61 - work_per_hz(CPU0) = W
67 - capacity(CPU0) = C
70 To draw the parallel with Arm big.LITTLE, CPU0 would be a big while CPU1 would
76 CPU0 work ^
86 CPU0 has the highest capacity in the system (C), and completes a fixed amount of
88 CPU0, and thus only completes W/2 in T.
96 - max_freq(CPU0) = F
101 - capacity(CPU0) = C
107 CPU0 work ^
190 - capacity(CPU0) = C
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/linux/tools/virtio/virtio-trace/
H A DREADME63 -chardev pipe,id=charchannel1,path=/tmp/virtio-trace/trace-path-cpu0\
65 id=channel1,name=trace-path-cpu0\
77 <source path='/tmp/virtio-trace/trace-path-cpu0'/>
78 <target type='virtio' name='trace-path-cpu0'/>
83 example, if a guest use three CPUs, chardev names should be trace-path-cpu0,
107 # cat /tmp/virtio-trace/trace-path-cpu0.out
/linux/arch/arm64/boot/dts/renesas/
H A Dulcb-simple-audio-card.dtsi9 * (A) CPU0 <----> ak4613
27 * (A) CPU0 <-> ak4613
59 * (A) CPU0 <-> ak4613
80 * (A) CPU0 <-> ak4613
H A Dulcb-audio-graph-card.dtsi9 * (A) CPU0 <-----> ak4613
23 dais = <&snd_ulcb1 /* (A) CPU0 <-> ak4613 */
34 * (A) CPU0 <-> ak4613
66 * (A) CPU0 <-> ak4613
H A Dulcb-audio-graph-card-mix+split.dtsi12 * (A) CPU0 (2ch) <-----> (2ch) (X) ak4613 (MIX-0)
30 dais = <&snd_ulcb1 /* (A) CPU0 */
47 /* (A) CPU0 <-> (X) ak4613 */
70 * (A) CPU0
H A Dulcb-audio-graph-card2-mix+split.dtsi12 * (A) CPU0 (2ch) <----> (2ch) (X) ak4613 (MIX-0)
29 links = <&fe_a /* (A) CPU0 */
44 * (A) CPU0 (MIX-0)
87 * (A) CPU0
H A Dulcb-simple-audio-card-mix+split.dtsi12 * (A) CPU0 (2ch) <----> (2ch) (X) ak4613 (MIX-0)
41 * (A) CPU0
83 * (A) CPU0
/linux/tools/power/cpupower/bench/
H A Dcpufreq-bench_script.sh30 echo $up_threshold >/sys/devices/system/cpu/cpu0/cpufreq/ondemand/up_threshold
31 echo $sampling_rate >/sys/devices/system/cpu/cpu0/cpufreq/ondemand/sampling_rate
32 up_threshold_set=$(cat /sys/devices/system/cpu/cpu0/cpufreq/ondemand/up_threshold)
33 sampling_rate_set=$(cat /sys/devices/system/cpu/cpu0/cpufreq/ondemand/sampling_rate)
/linux/Documentation/devicetree/bindings/thermal/
H A Dthermal-cooling-devices.yaml59 // Example 1: Cpufreq cooling device on CPU0
64 CPU0: cpu@0 {
97 cpu0-thermal {
115 cooling-device = <&CPU0 5 5>;
/linux/Documentation/translations/zh_CN/cpu-freq/
H A Dcpufreq-stats.rst57 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # ls -l
79 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat time_in_state
93 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat total_trans
107 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat trans_table
/linux/Documentation/translations/zh_TW/cpu-freq/
H A Dcpufreq-stats.rst57 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # ls -l
79 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat time_in_state
93 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat total_trans
107 <mysystem>:/sys/devices/system/cpu/cpu0/cpufreq/stats # cat trans_table
/linux/arch/arm/mach-omap2/
H A Domap-mpuss-lowpower.c10 * CPU0 and CPU1 LPRM modules.
11 * CPU0, CPU1 and MPUSS each have there own power domain and
14 * The CPU0 and CPU1 can't support Closed switch Retention (CSWR)
23 * CPU0 CPU1 MPUSS
32 * Note: CPU0 is the master core and it is the last CPU to go down
115 * Program the wakeup routine address for the CPU0 and CPU1
388 pr_err("Lookup failed for CPU0 pwrdm\n"); in omap4_mpuss_init()
396 /* Initialise CPU0 power domain state to ON */ in omap4_mpuss_init()
H A Dcpuidle44xx.c128 * CPU0 has to wait and stay ON until CPU1 is OFF state. in omap_enter_idle_coupled()
239 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
247 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
257 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
276 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
284 /* C2 - CPU0 RET + CPU1 RET + MPU CSWR */
/linux/arch/riscv/include/asm/
H A Dmembarrier.h29 * to the mm for which a membarrier SYNC_CORE is done on CPU0: in membarrier_arch_switch_mm()
31 * - [CPU0] sets all bits in the mm icache_stale_mask (in in membarrier_arch_switch_mm()
36 * - [CPU0] loads rq->curr within membarrier and observes in membarrier_arch_switch_mm()
/linux/kernel/sched/
H A Dmembarrier.c21 * The memory barrier at the start of membarrier() on CPU0 is necessary in
22 * order to enforce the guarantee that any writes occurring on CPU0 before
26 * CPU0 CPU1
57 * The memory barrier at the end of membarrier() on CPU0 is necessary in
60 * CPU0 after the membarrier():
62 * CPU0 CPU1
86 * CPU0 CPU1
104 * and Thread B). Thread A runs on CPU0, Thread B runs on CPU1.
106 * CPU0 CPU1
120 * CPU0 CPU1
/linux/kernel/time/
H A Dtimer_migration.c128 * migrator = CPU0 migrator = CPU2
129 * active = CPU0 active = CPU2
135 * 1. CPU0 goes idle. As the update is performed group wise, in the first step
136 * only GRP0:0 is updated. The update of GRP1:0 is pending as CPU0 has to
150 * 2. While CPU0 goes idle and continues to update the state, CPU1 comes out of
152 * has to walk the hierarchy. Both CPUs (CPU0 and CPU1) now walk the
168 * step 2) through the hierarchy to GRP1:0 before CPU0 (step 1) did. The
183 * 4. Now CPU0 finally propagates its changes (from step 1) to GRP1:0.
197 * The race of CPU0 vs. CPU1 led to an inconsistent state in GRP1:0. CPU1 is
205 * counter: The update as performed by CPU0 in step 4 will fail. CPU1 changed
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