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/linux/drivers/net/ethernet/ti/
H A Dcpsw_switchdev.c15 #include "cpsw.h"
29 struct cpsw_common *cpsw = priv->cpsw; in cpsw_port_stp_state_set() local
51 ret = cpsw_ale_control_set(cpsw->ale, priv->emac_port, in cpsw_port_stp_state_set()
62 struct cpsw_common *cpsw = priv->cpsw; in cpsw_port_attr_br_flags_set() local
73 cpsw_ale_set_unreg_mcast(cpsw->ale, BIT(priv->emac_port), in cpsw_port_attr_br_flags_set()
121 struct cpsw_common *cpsw = priv->cpsw; in cpsw_get_pvid() local
128 if (cpsw->version == CPSW_VERSION_1) in cpsw_get_pvid()
130 pvid = slave_read(cpsw->slaves + (priv->emac_port - 1), reg); in cpsw_get_pvid()
132 port_vlan_reg = &cpsw->host_port_regs->port_vlan; in cpsw_get_pvid()
143 struct cpsw_common *cpsw = priv->cpsw; in cpsw_set_pvid() local
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H A Dam65-cpsw-switchdev.c14 #include "am65-cpsw-nuss.h"
15 #include "am65-cpsw-switchdev.h"
27 struct am65_cpsw_common *cpsw = port->common; in am65_cpsw_port_stp_state_set() local
49 ret = cpsw_ale_control_set(cpsw->ale, port->port_id, in am65_cpsw_port_stp_state_set()
60 struct am65_cpsw_common *cpsw = port->common; in am65_cpsw_port_attr_br_flags_set() local
71 cpsw_ale_set_unreg_mcast(cpsw->ale, BIT(port->port_id), in am65_cpsw_port_attr_br_flags_set()
119 struct am65_cpsw_common *cpsw = port->common; in am65_cpsw_get_pvid() local
120 struct am65_cpsw_host *host_p = am65_common_get_host(cpsw); in am65_cpsw_get_pvid()
135 struct am65_cpsw_common *cpsw = port->common; in am65_cpsw_set_pvid() local
136 struct am65_cpsw_host *host_p = am65_common_get_host(cpsw); in am65_cpsw_set_pvid()
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H A DKconfig44 bool "TI CPSW Phy mode Selection (DEPRECATED)"
48 the CPSW. DEPRECATED: use PHY_TI_GMII_SEL.
51 tristate "TI CPSW Switch Support"
60 This driver supports TI's CPSW Ethernet Switch.
63 will be called cpsw.
66 tristate "TI CPSW Switch Support with switchdev"
77 This driver supports TI's CPSW Ethernet Switch.
89 the CPSW Ethernet Switch and Keystone 2 1g/10g Switch Subsystem.
97 tristate "TI K3 AM654x/J721E CPSW Ethernet driver"
114 will be called ti-am65-cpsw-nuss.
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H A Dcpsw-phy-sel.c16 #include "cpsw.h"
165 node = of_parse_phandle(dev->of_node, "cpsw-phy-sel", 0); in cpsw_phy_sel()
167 node = of_get_child_by_name(dev->of_node, "cpsw-phy-sel"); in cpsw_phy_sel()
192 .compatible = "ti,am3352-cpsw-phy-sel",
196 .compatible = "ti,dra7xx-cpsw-phy-sel",
200 .compatible = "ti,am43xx-cpsw-phy-sel",
217 dev_err(&pdev->dev, "unable to alloc memory for cpsw phy sel\n"); in cpsw_phy_sel_probe()
238 .name = "cpsw-phy-sel",
H A Dam65-cpsw-switchdev.h16 int am65_cpsw_switchdev_register_notifiers(struct am65_cpsw_common *cpsw);
17 void am65_cpsw_switchdev_unregister_notifiers(struct am65_cpsw_common *cpsw);
19 static inline int am65_cpsw_switchdev_register_notifiers(struct am65_cpsw_common *cpsw) in am65_cpsw_switchdev_register_notifiers() argument
24 static inline void am65_cpsw_switchdev_unregister_notifiers(struct am65_cpsw_common *cpsw) in am65_cpsw_switchdev_unregister_notifiers() argument
H A Dcpsw_switchdev.h12 int cpsw_switchdev_register_notifiers(struct cpsw_common *cpsw);
13 void cpsw_switchdev_unregister_notifiers(struct cpsw_common *cpsw);
H A Dcpsw-common.c9 #include "cpsw.h"
93 MODULE_DESCRIPTION("TI CPSW Switch common module");
H A Dam65-cpsw-nuss.h18 #include "am65-cpsw-qos.h"
219 #define AM65_CPSW_DRV_NAME "am65-cpsw-nuss"
/linux/Documentation/devicetree/bindings/net/
H A Dcpsw-phy-sel.txt1 TI CPSW Phy mode Selection Device Tree Bindings (DEPRECATED)
5 - compatible : Should be "ti,am3352-cpsw-phy-sel" for am335x platform and
6 "ti,dra7xx-cpsw-phy-sel" for dra7xx platform
7 "ti,am43xx-cpsw-phy-sel" for am43xx platform
8 - reg : physical base address and size of the cpsw
18 phy_sel: cpsw-phy-sel@44e10650 {
19 compatible = "ti,am3352-cpsw-phy-sel";
25 phy_sel: cpsw-phy-sel@44e10650 {
26 compatible = "ti,am3352-cpsw-phy-sel";
H A Dcpsw.txt6 "ti,cpsw" for backward compatible
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
22 - cpsw-phy-sel : Specifies the phandle to the CPSW phy mode selection
23 device. See also cpsw-phy-sel.txt for its binding.
24 Note that in legacy cases cpsw-phy-sel may be
34 required to be driven so that cpsw data lines
37 driven low so that cpsw slave 0 and phy data
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H A Dti,k3-am654-cpsw-nuss.yaml4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml#
57 - ti,am642-cpsw-nuss
58 - ti,am654-cpsw-nuss
60 - ti,j721e-cpsw-nuss
127 description: CPSW port number
132 - description: CPSW MAC's PHY.
176 CPSW MDIO bus.
182 CPSW Common Platform Time Sync (CPTS) module.
251 compatible = "ti,am654-cpsw-nuss";
293 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
/linux/Documentation/devicetree/bindings/phy/
H A Dti,phy-gmii-sel.yaml8 title: CPSW Port's Interface Mode Selection PHY
22 | CPSW | | +---------+ |
41 CPSW Port's Interface Mode Selection PHY describes MII interface mode between
42 CPSW Port and Ethernet PHY which depends on Eth PHY and board configuration.
44 CPSW Port's Interface Mode Selection PHY device should defined as child device
45 of SCM node (scm_conf) and can be attached to each CPSW port node using standard
96 description: CPSW port number (starting from 1)
153 - CPSW port number (starting from 1)
/linux/Documentation/networking/devlink/
H A Dam65-nuss-cpsw-switch.rst4 am65-cpsw-nuss devlink support
7 This document describes the devlink features implemented by the ``am65-cpsw-nuss``
13 The ``am65-cpsw-nuss`` driver implements the following driver-specific
H A Dti-cpsw-switch.rst4 ti-cpsw-switch devlink support
7 This document describes the devlink features implemented by the ``ti-cpsw-switch``
13 The ``ti-cpsw-switch`` driver implements the following driver-specific
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-sancloud-bbe-common.dtsi7 cpsw_default: cpsw-default-pins {
25 cpsw_sleep: cpsw-sleep-pins {
H A Dam335x-bonegreen-eco.dts130 cpsw_b_default: cpsw-b-default-pins {
147 cpsw_b_sleep: cpsw-b-sleep-pins {
H A Dam335x-chiliboard.dts46 cpsw_default: cpsw-default-pins {
60 cpsw_sleep: cpsw-sleep-pins {
H A Dam335x-icev2.dts202 cpsw_default: cpsw-default-pins {
225 cpsw_sleep: cpsw-sleep-pins {
471 /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
H A Dam335x-moxa-uc-2101.dts31 cpsw_default: cpsw-default-pins {
H A Dam335x-lxm.dts62 cpsw_default: cpsw-default-pins {
88 cpsw_sleep: cpsw-sleep-pins {
/linux/drivers/phy/ti/
H A DKconfig112 This driver supports configuring of the TI CPSW Port mode depending on
113 the Ethernet PHY connected to the CPSW Port.
H A Dphy-gmii-sel.c3 * Texas Instruments CPSW Port's PHY Interface Mode selection Driver
7 * Based on cpsw-phy-sel.c driver created by Mugunthan V N <mugunthanvnm@ti.com>
573 MODULE_DESCRIPTION("TI CPSW Port's PHY Interface Mode selection Driver");
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am64-phycore-som.dtsi82 cpsw_mdio_pins_default: cpsw-mdio-default-pins {
91 cpsw_rgmii1_pins_default: cpsw-rgmii1-default-pins {
H A Dk3-j721s2-evm-gesi-exp-board.dtso25 main_cpsw_mdio_default_pins: main-cpsw-mdio-default-pins {
H A Dk3-am65-mcu.dtsi16 compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
333 compatible = "ti,am654-cpsw-nuss";
373 compatible = "ti,cpsw-mdio","ti,davinci_mdio";

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