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/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77961.dtsi151 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
165 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
181 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
194 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
207 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
220 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
785 <&cpg CPG_CORE R8A77961_CLK_S3D1>,
803 <&cpg CPG_CORE R8A77961_CLK_S3D1>,
821 <&cpg CPG_CORE R8A77961_CLK_S3D1>,
839 <&cpg CPG_CORE R8A77961_CLK_S3D1>,
[all …]
H A Dr8a774a1.dtsi129 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
142 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
157 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
169 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
181 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
193 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
736 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
754 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
772 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
790 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
[all …]
H A Dr8a774c0.dtsi78 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
89 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
605 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
623 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
641 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
659 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
676 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
984 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
987 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1000 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
[all …]
H A Dr8a774e1.dtsi136 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
150 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
164 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
178 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
194 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
207 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
220 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
233 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
800 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
818 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
[all …]
H A Dr8a77990.dtsi79 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>;
91 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>;
620 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
638 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
656 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
674 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
691 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1016 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1019 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1032 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
[all …]
H A Dr8a77995.dtsi479 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
497 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
569 <&cpg CPG_CORE R8A77995_CLK_CANFD>,
572 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
806 <&cpg CPG_CORE R8A77995_CLK_CANFD>,
809 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
822 <&cpg CPG_CORE R8A77995_CLK_CANFD>,
825 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
878 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
895 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
[all …]
H A Dr8a77980.dtsi34 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
44 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
54 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
64 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
531 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
549 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
567 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
585 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
614 <&cpg CPG_CORE R8A77980_CLK_CANFD>,
617 assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
[all …]
H A Dr8a77951.dtsi151 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
165 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
179 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
193 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
209 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
222 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
235 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
248 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
821 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
839 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
[all …]
H A Dr8a77960.dtsi151 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
165 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
181 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
194 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
207 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
220 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
785 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
803 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
821 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
839 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
[all …]
H A Dr8a77970.dtsi34 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
44 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
489 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
507 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
525 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
542 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
561 <&cpg CPG_CORE R8A77970_CLK_CANFD>,
564 assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
685 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
703 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
[all …]
H A Dr8a774b1.dtsi83 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
94 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
620 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
638 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
656 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
674 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
691 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1028 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1031 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1044 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
[all …]
H A Dr9a09g057.dtsi66 clocks = <&cpg CPG_CORE R9A09G057_CA55_0_CORE_CLK0>;
76 clocks = <&cpg CPG_CORE R9A09G057_CA55_0_CORE_CLK1>;
86 clocks = <&cpg CPG_CORE R9A09G057_CA55_0_CORE_CLK2>;
96 clocks = <&cpg CPG_CORE R9A09G057_CA55_0_CORE_CLK3>;
226 clocks = <&cpg CPG_CORE R9A09G057_IOTOP_0_SHCLK>;
250 clocks = <&cpg CPG_CORE R9A09G057_SYS_0_PCLK>;
H A Dr8a77965.dtsi104 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
116 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
656 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
674 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
692 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
710 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
727 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1066 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1069 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1082 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
[all …]
H A Dr8a779g0.dtsi96 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
108 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
120 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
132 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
697 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
714 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
731 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
748 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
887 <&cpg CPG_CORE R8A779G0_CLK_CANFD>,
890 assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>;
[all …]
H A Dr8a779h0.dtsi75 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC0>;
87 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC1>;
99 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC2>;
111 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC3>;
596 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
613 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
630 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
647 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
726 <&cpg CPG_CORE R8A779H0_CLK_CANFD>,
729 assigned-clocks = <&cpg CPG_CORE R8A779H0_CLK_CANFD>;
[all …]
H A Dr8a779a0.dtsi34 clocks = <&cpg CPG_CORE R8A779A0_CLK_Z0>;
371 clocks = <&cpg CPG_CORE R8A779A0_CLK_CP>;
567 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
583 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
599 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
615 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
633 <&cpg CPG_CORE R8A779A0_CLK_CANFD>,
636 assigned-clocks = <&cpg CPG_CORE R8A779A0_CLK_CANFD>;
1025 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
1041 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
[all …]
H A Dr9a07g054.dtsi94 clocks = <&cpg CPG_CORE R9A07G054_CLK_I>;
104 clocks = <&cpg CPG_CORE R9A07G054_CLK_I>;
520 <&cpg CPG_CORE R9A07G054_CLK_P0_DIV2>,
523 assigned-clocks = <&cpg CPG_CORE R9A07G054_CLK_P0_DIV2>;
1102 <&cpg CPG_CORE R9A07G054_CLK_HP>;
1122 <&cpg CPG_CORE R9A07G054_CLK_HP>;
H A Dr9a07g044.dtsi94 clocks = <&cpg CPG_CORE R9A07G044_CLK_I>;
104 clocks = <&cpg CPG_CORE R9A07G044_CLK_I>;
515 <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>,
518 assigned-clocks = <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>;
1094 <&cpg CPG_CORE R9A07G044_CLK_HP>;
1114 <&cpg CPG_CORE R9A07G044_CLK_HP>;
/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,dsi-csi2-tx.yaml94 <&cpg CPG_CORE R8A779A0_CLK_DSI>,
95 <&cpg CPG_CORE R8A779A0_CLK_CP>;
H A Drenesas,dw-hdmi.yaml89 clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;
/linux/arch/arm/boot/dts/renesas/
H A Dr8a77470.dtsi34 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
45 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
632 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
648 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
664 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
680 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
696 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
712 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
728 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
744 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
[all …]
/linux/Documentation/devicetree/bindings/net/can/
H A Drenesas,rcar-canfd.yaml201 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
204 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
/linux/include/dt-bindings/clock/
H A Drenesas-cpg-mssr.h8 #define CPG_CORE 0 /* Core Clock */ macro
/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,rzv2h-cpg.yaml38 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
H A Drenesas,rzg2l-cpg.yaml47 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"

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