Home
last modified time | relevance | path

Searched full:clk_top_msdcpll_d2 (Results 1 – 20 of 20) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmtk-sd.txt70 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
H A Dmtk-sd.yaml334 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dmt6797-clk.h102 #define CLK_TOP_MSDCPLL_D2 92 macro
H A Dmediatek,mt6795-clk.h46 #define CLK_TOP_MSDCPLL_D2 35 macro
H A Dmt8173-clk.h48 #define CLK_TOP_MSDCPLL_D2 38 macro
H A Dmt6765-clk.h75 #define CLK_TOP_MSDCPLL_D2 40 macro
H A Dmediatek,mt8365-clk.h64 #define CLK_TOP_MSDCPLL_D2 54 macro
H A Dmt8183-clk.h122 #define CLK_TOP_MSDCPLL_D2 86 macro
H A Dmt2712-clk.h111 #define CLK_TOP_MSDCPLL_D2 80 macro
H A Dmt8186-clk.h130 #define CLK_TOP_MSDCPLL_D2 111 macro
H A Dmt6779-clk.h97 #define CLK_TOP_MSDCPLL_D2 87 macro
H A Dmt2701-clk.h48 #define CLK_TOP_MSDCPLL_D2 38 macro
H A Dmt8192-clk.h137 #define CLK_TOP_MSDCPLL_D2 125 macro
H A Dmediatek,mt8188-clk.h168 #define CLK_TOP_MSDCPLL_D2 157 macro
H A Dmt8195-clk.h203 #define CLK_TOP_MSDCPLL_D2 191 macro
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8183-kukui.dtsi387 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
H A Dmt8173-elm.dtsi395 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
H A Dmt8188.dtsi1508 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
H A Dmt8195.dtsi1410 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
1425 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
H A Dmt8186.dtsi1619 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;