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Searched full:clk_top_aud_engen1_sel (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/sound/
H A Dmediatek,mt8365-afe.yaml102 <&topckgen CLK_TOP_AUD_ENGEN1_SEL>,
/linux/include/dt-bindings/clock/
H A Dmt8516-clk.h178 #define CLK_TOP_AUD_ENGEN1_SEL 146 macro
H A Dmt6765-clk.h149 #define CLK_TOP_AUD_ENGEN1_SEL 114 macro
H A Dmediatek,mt8365-clk.h90 #define CLK_TOP_AUD_ENGEN1_SEL 80 macro
H A Dmt8192-clk.h55 #define CLK_TOP_AUD_ENGEN1_SEL 43 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8516.c399 MUX(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel", aud_engen1_parents,
H A Dclk-mt8167.c588 MUX(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel", aud_engen1_parents,
H A Dclk-mt8365.c461 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel",
H A Dclk-mt6765.c428 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel",
H A Dclk-mt8192.c649 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel",
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi1165 <&topckgen CLK_TOP_AUD_ENGEN1_SEL>,
H A Dmt8192.dtsi1014 <&topckgen CLK_TOP_AUD_ENGEN1_SEL>,