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Searched full:clk_mm_mdp_rdma0 (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt6765-mm.c26 GATE_MM(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_ck", 0),
H A Dclk-mt8183-mm.c48 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 12),
H A Dclk-mt6795-mm.c36 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 3),
H A Dclk-mt6797-mm.c37 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 4),
H A Dclk-mt6779-mm.c48 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 12),
H A Dclk-mt8173-mm.c40 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 3),
H A Dclk-mt2712-mm.c47 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 3),
/linux/Documentation/devicetree/bindings/media/
H A Dmediatek-mdp.txt36 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
H A Dmediatek,mdp3-rdma.yaml162 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
/linux/include/dt-bindings/clock/
H A Dmt6797-clk.h219 #define CLK_MM_MDP_RDMA0 5 macro
H A Dmediatek,mt6795-clk.h222 #define CLK_MM_MDP_RDMA0 3 macro
H A Dmt8173-clk.h251 #define CLK_MM_MDP_RDMA0 4 macro
H A Dmt6765-clk.h251 #define CLK_MM_MDP_RDMA0 0 macro
H A Dmt8183-clk.h321 #define CLK_MM_MDP_RDMA0 12 macro
H A Dmt2712-clk.h304 #define CLK_MM_MDP_RDMA0 3 macro
H A Dmt6779-clk.h353 #define CLK_MM_MDP_RDMA0 13 macro
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi1013 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
H A Dmt8183.dtsi1678 clocks = <&mmsys CLK_MM_MDP_RDMA0>,