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Searched full:clk_mm_disp_postmask0 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8186-mm.c46 GATE_MM0(CLK_MM_DISP_POSTMASK0, "mm_disp_postmask0", "top_disp", 14),
H A Dclk-mt8192-mm.c56 GATE_MM0(CLK_MM_DISP_POSTMASK0, "mm_disp_postmask0", "disp_sel", 13),
H A Dclk-mt6779-mm.c83 GATE_MM1(CLK_MM_DISP_POSTMASK0, "mm_disp_pm0", "mm_sel", 14),
H A Dclk-mt8196-disp0.c135 GATE_HWV_MM1(CLK_MM_DISP_POSTMASK0, "mm_disp_postmask0", "disp", 16),
/linux/include/dt-bindings/clock/
H A Dmt6779-clk.h388 #define CLK_MM_DISP_POSTMASK0 48 macro
H A Dmt8186-clk.h314 #define CLK_MM_DISP_POSTMASK0 13 macro
H A Dmt8192-clk.h437 #define CLK_MM_DISP_POSTMASK0 13 macro
H A Dmediatek,mt8196-clock.h432 #define CLK_MM_DISP_POSTMASK0 48 macro
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi1582 clocks = <&mmsys CLK_MM_DISP_POSTMASK0>;