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Searched full:clk_mcu_bus_sel (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/interconnect/
H A Dmediatek,cci.yaml73 clocks = <&mcucfg CLK_MCU_BUS_SEL>,
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi156 clocks = <&mcucfg CLK_MCU_BUS_SEL>,
176 clocks = <&mcucfg CLK_MCU_BUS_SEL>,
196 clocks = <&mcucfg CLK_MCU_BUS_SEL>,
216 clocks = <&mcucfg CLK_MCU_BUS_SEL>,
/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h296 #define CLK_MCU_BUS_SEL 0 macro
H A Dmt8183-clk.h423 #define CLK_MCU_BUS_SEL 2 macro
H A Dmt2712-clk.h291 #define CLK_MCU_BUS_SEL 2 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c538 MUX_GATE_FLAGS(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0,
H A Dclk-mt2712.c788 MUX_GATE_FLAGS(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0,
H A Dclk-mt8183.c615 MUX(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0, 9, 2),