Searched full:clk_mcu_bus_sel (Results 1 – 7 of 7) sorted by relevance
| /linux/Documentation/devicetree/bindings/interconnect/ |
| H A D | mediatek,cci.yaml | 68 clocks = <&mcucfg CLK_MCU_BUS_SEL>,
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| /linux/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 296 #define CLK_MCU_BUS_SEL 0 macro
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| H A D | mt8183-clk.h | 423 #define CLK_MCU_BUS_SEL 2 macro
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| H A D | mt2712-clk.h | 291 #define CLK_MCU_BUS_SEL 2 macro
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 538 MUX_GATE_FLAGS(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0,
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| H A D | clk-mt2712.c | 788 MUX_GATE_FLAGS(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0,
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| H A D | clk-mt8183.c | 615 MUX(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0, 9, 2),
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