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Searched full:clk_apmixed_tvdpll (Results 1 – 25 of 31) sorted by relevance

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/linux/include/dt-bindings/clock/
H A Dmediatek,mt6735-apmixedsys.h12 #define CLK_APMIXED_TVDPLL 6 macro
H A Dmt8167-clk.h17 #define CLK_APMIXED_TVDPLL (CLK_APMIXED_NR_CLK + 0) macro
H A Dmt8135-clk.h114 #define CLK_APMIXED_TVDPLL 7 macro
H A Dmt6797-clk.h113 #define CLK_APMIXED_TVDPLL 6 macro
H A Dmediatek,mt6795-clk.h147 #define CLK_APMIXED_TVDPLL 6 macro
H A Dmt8173-clk.h163 #define CLK_APMIXED_TVDPLL 8 macro
H A Dmt8183-clk.h19 #define CLK_APMIXED_TVDPLL 8 macro
H A Dmt2712-clk.h22 #define CLK_APMIXED_TVDPLL 10 macro
H A Dmt6779-clk.h176 #define CLK_APMIXED_TVDPLL 11 macro
H A Dmt8186-clk.h275 #define CLK_APMIXED_TVDPLL 11 macro
H A Dmt2701-clk.h180 #define CLK_APMIXED_TVDPLL 6 macro
H A Dmt8192-clk.h308 #define CLK_APMIXED_TVDPLL 7 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8186-apmixedsys.c73 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0264, 0x0270, 0,
127 FH(CLK_APMIXED_TVDPLL, FH_TVDPLL, 0x00A0),
H A Dclk-mt6795-apmixedsys.c56 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x270, 0x27c, 0, 0, 21, 0x270, 4, 0x0, 0x274, 0),
109 FH(CLK_APMIXED_TVDPLL, FH_TVDPLL, 0xc4),
H A Dclk-mt8192-apmixedsys.c87 PLL_B(CLK_APMIXED_TVDPLL, "tvdpll", 0x0380, 0x038c, 0x00000000,
143 FH(CLK_APMIXED_TVDPLL, FH_TVDPLL, 0x154),
H A Dclk-mt8173-apmixedsys.c73 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x270, 0x27c, 0, 0, 21, 0x270, 4, 0x0, 0x274, 0),
128 FH(CLK_APMIXED_TVDPLL, FH_TVDPLL, 0xc4),
H A Dclk-mt8135-apmixedsys.c44 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x294, 0x2ac, 0x80000000, 0, 31, 0x294, 6, 0x0, 0x298, 0),
H A Dclk-mt6735-apmixedsys.c75 …PLL(CLK_APMIXED_TVDPLL, "tvdpll", TVDPLL_CON0, TVDPLL_PWR_CON0, 0x00000001, 0, TVDPLL_CON1, 24, 0,…
H A Dclk-mt8167-apmixedsys.c71 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x01C0, 0x01D0, 0, 0,
H A Dclk-mt2712-apmixedsys.c100 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0290, 0x029C, 0xc0000100,
H A Dclk-mt8183-apmixedsys.c131 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0260, 0x026C, 0,
H A Dclk-mt6797.c637 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0270, 0x027C, 0xC0000120, 0, 21,
H A Dclk-mt2701.c950 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x250, 0x25c, 0x00000001, 0,
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,dpi.yaml126 <&apmixedsys CLK_APMIXED_TVDPLL>;
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi223 <&apmixedsys CLK_APMIXED_TVDPLL>;

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